FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5203 Discussions

Clock speed (Single MIPS processor)

Honored Contributor II

How high clock speed can my Key3 run on?  

I got 1000.0 MHz, but my buddy got 50.44 MHz. 

What can the problem be? 



Clock Name Type Period Frequency Rise Fall Duty Cycle Divide by Multiply by Phase Offset Edge List Edge Shift Inverted Master Source Targets  


CLOCK_50 Base 1.000 1000.0 MHz 0.000 0.500 { CLOCK_50 }  

KEY[3] Base 1.000 1000.0 MHz 0.000 0.500 { KEY[3] }
0 Kudos
0 Replies