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Connecting PCI 7200 type interface to avalon bus

Altera_Forum
Honored Contributor II
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Hi, 

 

I need to connect a PCI 7200 logic block to avalon bus using SOPB builder. This is what I have till now; I was able to create a custom bridge block (slave) which on one side interfaces with the PCI 7200 signals and the other side interfaces with avalon signals. This bridge would bascially have to send data to PCI express compiler through the avalon bus that SOPC builder interfaces all components. 

 

Here are the signals on the PCI-7200 side of the bridge 

 

PCI_readdata [31:0] (input to bridge) 

PCI_i_req (input to bridge) 

PCI_i_ack (output from bridge) 

 

PCI_writedata [31:0] (output from bridge) 

PCI_o_req [31:0] (output from bridge) 

PCI_o_ack (input to bridge) 

 

IOs that connect from brdige to avalon signal type 

avalon_readdata [31:0] (output from bridge)-- to avalon signal type 'readdata' (this connected and latched internal to the bridge with PCI_readdata bus) 

avalon_rd_enable (ouput from bridge)-- to avalon signal type 'dataavailable' (this is connected and latched internal to bridge with PCI_i_req) 

avalon_writedata [31:0] (input to bridge)-- from avalon bus 'writedata' (this is connected and latched internal to bridge with PCI_writedata) 

avalon_wr_enable (input to bridge)-- from avalon bus 'write' (this is connected and latched internal to bridge with PCI_o_req) 

 

First, is I am not sure if the avalon_rd_enable signal is connected to the correct signal type on the avalon bus 'dataavailable' 

Second, I dont know where to connecte the PCI_i_ack which would be generated after the avalon bus has latched on the readdata bus. 

Third, I am not sure where to connect PCI_o_ack which is generated by 7200 logic to tell it has latched to the writedata bus and ready to accept more. 

 

Also, I am not sure if I would have bus contention if I use the read and write bus of the same avalon_slave or do I need to use two avalon slaves or if I need to use a master for readbus (since the read transfer is intiated by the PCI-7200 logic) and a slave for writebus. 

 

If someone could help me out that would be greatly appreciated. 

 

Thanks a lot in advance for any suggestions or ideas 

 

-EDA1
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