Converting .sof file to .flash file for Stratix 10 GX development kit

[cconger]

Hello Intel,

I have the Stratix 10 GX development kit, and am needing to load a user design into the Flash for auto-configuration of the user design at power up.  I've been following through the documentation, and have successfully reached the page in the Board Update Portal where you specify a hardware file.

However, the method of converting the Quartus Prime produced .sof file into the necessary .flash file, is not documented clearly.

The link to the instructions to convert the .sof file state the following:

Convert user .sof file and .elf file to the format required to program the Flash
Note: You must have the Nios® II EDS installed in order to perform this step.
1. From the Start Menu, open Nios II Command Shell
2.  In the Nios II Command Shell, navigate to the build_hw.sh file and type

    sh build_hw.sh yourfile_hw.sof 1

However, I cannot find the build_hw.sh script anywhere.  The instructions only say to navigate to it, but do not say where it is.

A search for that filename in the Quartus Prime 23.1 installation directory does not find it.  I was able to find one version of it buried deep in the design material .zip file downloaded from the Stratix 10 GX product page:

stratix10GX_1sg280uf50_fpga_revd_htile_v18.1b222_v1.0.zip\stratix10GX_1sg280uf50_fpga_revd_htile_v18.1b222_v1.0\factory_recovery\build_factory_source\PRD\build_hw.sh

But this does not appear to be the correct script (looks like it will produce a .pof, and we need a .flash right?), and anyways it does not execute correctly when invoked from within the Nios II power shell as it exits with a syntax error.

I saw this previous post with a similar question however it was never actually solved, only marked as complete as the OP stopped responding:

Solved: Procedure for programming the hardware1 region of flash on my Stratix 10 GX development board? - Intel Communities

Please help clarify the process of converting the .sof file into whatever format is needed to load into flash from the Board Update Portal.  If I need to use a specific script from within the Nios II power shell, where is that script located?  Is there any alternative, or command line command I can enter manually like was done previously with the Arria 10 GX dev kit (sof2flash)?

[EBERLAZARE_I_Intel]

Hi,

I need to re-check again, as this was the step to create it for Stratix 10 devices. I will get back you again. We apologies for the inconvenience.

[EBERLAZARE_I_Intel]

Hi,

From our internal team, they are the correct way to convert, as of now I am verifying the steps for the Board Update Portal.

[ChrisConger]

That is good to hear, I suppose that means I am close then.

From the longer reply I sent above walking through every screen and every step, can you help me figure out what I am missing or doing wrong?  Are you specifying Active Serial x4 as the Configuration Mode setting in the Create Programming File GUI when generating the .rpd?  If not, what configuration mode should be specified?  Or if so, what is your MSEL selection using SW1 when you successfully boot from Flash using the User Design you converted using these steps?  The board default SW1 setting is AVST x16, does it need to be switched to something other than the default if loading a user design generated with a different Configuration Mode?

Is there supposed to be an offset provided when doing the .rpd to .flash conversion using the nios2-elf-objcopy command?

There must be some step I am missing if this is correct, I am hoping my verbose post above showing every screenshot and every board setting that I have been told to use, will help give some info as to what I am doing wrong.

[EBERLAZARE_I_Intel]

Hi,

That is a good point, I'm not that familiar with the configuration let me start from that. In Quartus > Assignments > Device > Device and pin options > Configuration.

This must match your MSEL pins set on your board.

[ChrisConger]

Well, I believe Intel should define what is the correct procedure for the customers... it is a bit confusing to get the MSEL pins to match due to the issue I mentioned in my previous verbose post where I showed every screen of the process.

You previously mentioned: "From our internal team, they are the correct way to convert, as of now I am verifying the steps for the Board Update Portal."... have you yourself successfully converted a .sof to a .flash and had it loaded into the Board Update Portal, and then successfully got the board to load that design from Flash?  If so, what settings did you use?

For me, it is confusing because the default MSEL settings of the Stratix 10 board is AVST x16.  However, Programming File Generator will not allow me to generate an .rpd if the Configuration Mode is set to AVST x16.  (However, the factory build from Intel loads at power-up when MSEL indicates AVST x16, so Intel was able to generate a .flash that configures in AVST x16 mode).

The other options in Programming File Generator do not match the MSEL jumper settings listed in the S10 GX dev kit user guide.  PFG gives me four options:  Active Serial x4, and AVST x8, x16, and x32.  Since any of the AVST won't allow me to generate an .rpd file, then I suppose Active Serial x4 is my only option.  Are you able to confirm from your team that this is in fact the Configuration Mode setting that must be used in PFG when producing the .rpd?

On the Stratix 10 board, the MSEL settings are documented as follows in the User Guide:

Is Quad SPI (QSPI) the same as Active Serial x4?  If so, should I use "Fast mode" "00" or "Normal mode" "01"?  I have already tried both and neither works.  Is there truly no way to produce an .rpd with AVST x16 as the configuration mode?  How is the factory build .flash file produced since it does configure in AVST x16 mode?

It would be very helpful, if the Intel team is successfully converting .sof to .flash and getting the board to boot, if you could clarify explicitly what of those settings are being used.

Finally, the Flash memory map is as follows from the S10 GX dev kit user guide:

So the user design is to be loaded at offset 0x02C0_0000... are you sure there is no offset that needs to eb specified in the .rpd to .flash conversion command using nios2-edf-objcopy?  There is an offset option for the command, if the design is getting loaded into the wrong location in Flash that could also cause it to not boot successfully,

Thank you again for your patience and assistance with this.  I feel like I followed the steps defined exactly and showed the screenshots for full clarity, but it is still not working so helping me figure out what I am doing wrong, and/or what steps or details were accidentally omitted from the instructions, will help Intel to have the process fully and correctly documented for all customers in the future.  I am happy to give any additional information that you would like.  Perhaps I can produce a simple design that just toggles LEDs and does not contain any proprietary design material, so that I can share the .sof in the thread and we can both work from the same .sof?

[ChrisConger]

It is worth confirming for you that when I produce the .sof from Quartus, the configuration mode is selected as AVST x16:

So this matches the default jumper settings on the S10 board.  However the confusion occurs when it comes time to convert the .sof into an .rpd, since AVST x16 is not an option to produce an .rpd.  At this point I select Active Serial x4:

Since selecting AVST x16 here will not allow me to specify an .rpd format file.

Is it a problem that the .sof is produced with AVST x16, and then the .rpd is produced with Active Serial x4?  Should I produce the .sof with Active Serial x4 as well, and if so, which of the two QSPI MSEL jumper settings is correct (00, 01)?  How does the Intel factory build work with jumpers set to AVST x16 mode (10) if Active Serial is the required mode to produce a .flash file?

This is the detail that would be useful if Intel could work out and clearly define.  If it helps to have me guess and try things via trial and error I'm happy to do so.  It's also possible that configuration mode isn't the problem and it is something else.

[ChrisConger]

edit:  got the factory build fixed, sorry for false alarm.

I regenerated the .sof with Active Serial x4 specified so that when converted to .rpd, the Configuration Mode would be consistent.  I also programmed the FPGA directly with this newly-generated .sof to ensure it works correctly, and it does.

Note that I do need to revert the MSEL pins to the default of "10" to specify AVST x16 for the factory build to program... I forgot to switch it back and thought I had bricked the board when the factory build wouldn't request an IP address via DHCP for me to connect to the Update Portal.  Switching the MSEL pins back to default makes the factory build work again.

So, the original .sof was generated in Quartus with Active Serial x4 specified in the Quartus > Assignments > Device > Device and pin options > Configuration menu, and then the .rpd was produced using File > Programming File Generator selecting Active Serial x4 as the Configuration Mode, .rpd as the output file type, and the .sof generated previously as the input file.

I converted that .rpd to .flash using the exact nios2-elf-objcopy command you indicated earlier (however, run from within a Windows command shell and not the Nios2 command shell).  This .flash was then uploaded through the Board Update Portal, and after successfully completing I powered off the board.  With power off, I switch the MSEL selection back to "01" to indicate QSPI x4 normal mode, and SW3.3 to load User Hardware1.

Powering on the board, I get four red LEDs blinking once per second and the design does not function.  This happens with both "01" and "00" MSEL setting.  If I revert back to "10" (AVST x16), it waits a few seconds then shows a single red LED solid on.  Switching SW3.3 back to factory build, the Board Update Portal design successfully configures.

[ChrisConger]

I've attached a .zip file with a demo design attached.  All it does it toggle the green LEDs on a counter, and the user pushbuttons illuminate the red LEDs.

I generated two .sofs... one with configuration mode specified as AVST x16, and one with Active Serial 4x.

I converted  both of those .sof to .rpd using the instructions you provided earlier, though note that I had to specify Active Serial 4x for both .sofs regardless of how they were produced, since that is the only option that allows the generation of .rpd

I would be curious if you are able to successfully convert either of the .rpd files to .flash, load the .flash to your L-tile S10 dev board via the Update Portal, and have that design automatically load from Flash on power cycle.

[EBERLAZARE_I_Intel]

Hi,

I have configured AS x4 and AVST previously it worked, but I haven't tested using Board update portal yet, I need to have the board test set up.

[EBERLAZARE_I_Intel]

Hi,

I have run through again the steps, for BUP for Stratix 10 it should be for the Hardware using ".bin" file generated using the "build_hw.sh your_sof.sof" command which will create a .bin as output as per the "build_hw.sh script", as per the document, and the Software if any, using ".flash".

Whereas, for Arria 10, it should just be ".flash" only.

Currently, I am having issue with the Nios II command shell using the script to generate the .bin for the Hardware.

Again, I apologies for the extended confusion on this issue, as we do not get Board Update Portal questions.

[ChrisConger]

Hi, so the build_hw.sh script is what I originally asked about in this thread (see first post).  That script does not exist in the Intel Quartus installation, but searching for the filename in the .zip file downloaded from the Intel website I was able to find one version of it.

However, it does not work when run, thus I posted this thread asking what the steps were.  That is when you replied with the team told you to produce an .rpd from Quartus PFG and convert that to .flash using the nios2-obj-copy command.

Now we are back to using the build_hw.sh script?  If so, where is that script located?

[EBERLAZARE_I_Intel]

Hi,

For Stratix 10, it resides here in the dev kit package:

<package dir>\factory_recovery\build_factory_source

https://www.intel.com/content/www/us/en/docs/programmable/683206/current/installing-the-development-board.html

https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/stratix/10-gx-signal-integrity.html

Currently we are trying to get the proper steps in. Please wait for the workaround.

[ChrisConger]

Thank you for your continued support on this issue, I truly do appreciate it.

One point of clarification, the two links you provided in the previous reply are for a different version of the Stratix 10 GX development kit.  If the contents are the same, or at least if the steps to produce a programming file to load into Flash is the same, then that is fine.  But I just wanted to be sure that we aren't talking about two different development boards.  The board I am using is the following:

Intel® Stratix® 10 GX FPGA Development Kit

Specifically the L-tile version.  The Intel page only has the downloadable design files for the H-tile version, however I am hopeful that it does not matter.  

Within that design package, the build_hw.sh contained in the factory_recovery/build_factory_source/PRD/ folder attempts to produce a .pof from a .sof, which I don't believe is possible (.pof not a supported format for a Stratix 10?  That is what Convert Programming File tells me anyways).  And the build_hw.sh does not execute out of the box anyways as it gives a syntax error when attempting to execute.

I will await further instruction as you requested, but again if we are working on two different development boards I wanted to be sure to point that out before we go too far.  Thanks again for your support here!

[ChrisConger]

Here are a couple of issues I've resolved with the build_hw.sh, in case it helps as the team works out the issues with the curently-documented process.

EOL format is incorrect for execution in Nio2 command shell or Linux prompt... need to do an EOL conversion to Unix format in a text editor capable of performing EOL conversion.  This resolved the syntax error issue upon trying to execute exactly as taken out of the .zip file.

quartus_cpf, which is the program invoked to convert a .sof into a .pof, is not supported for Stratix 10 devices.  I was mistaken previously thinking .pof is not supported for S10, it is but rather it is the Quartus Convert Programming File application that does not support Stratix 10.  I used Programming File Generator from within Quartus to produce a .pof file from my .sof (attempting to copy the .cof settings from the build_hw.sh script... note that the Stratix 10 GX dev kit settings are different from those in the Signal Integrity dev kit you linked earlier so I think it is important to use the right dev kit file), then specified that .pof file as input so that the conversion step in build_hw.sh is skipped and we avoid the error of quartus_cpf not working.

Next, I get syntax errors with the length calculation using 'expr':

Generating binary file...
expr: syntax error
dd: invalid number: ‘’

So if I manually typed that series of commands in, I come up with a skip value of 46137391.  Finally manually typing the 'dd' command in using the hand-calculated length value, I can produce a .bin file.

After loading the .bin file in to the portal as you suggested earlier, it still doesn't work.  So there is still work to do for Intel, but I wanted to point out the issues that I found in the build_hw.sh script:

- EOL conversion needed to avoid syntax error

- .sof conversion does not work since it uses quartus_cpf, and that can't be used for Stratix 10 devices

- syntax error regarding the 'expr' steps causes final .bin file generation to fail due to empty input argument to 'dd' command

[EBERLAZARE_I_Intel]

Hi,

Thanks a lot for the input, we are still working on the getting the workaround for this.

[EBERLAZARE_I_Intel]

Hi Chris,

We are still working on the workaround. In the meantime, do you have your own design/project that you're working on?

Alternatively, we could recommend to you using RSU for your project, Remote System Update:

https://www.intel.com/content/www/us/en/docs/programmable/683021/22-4/use-cases-s10-fm.html

https://www.rocketboards.org/foswiki/Projects/Stratix10HPSRemoteSystemUpdate

[EBERLAZARE_I_Intel]

Hi,

Would it work for you if you try to work towards RSU for your design?

[ChrisConger]

Hi, sorry for the delayed reply I've been on travel for work.

So, we are still actively using the Stratix 10 dev kit as the base board for an environmental testing platform that we've developed.  We previously used the Arria 10 dev kit, but wanted to move to the more powerful Stratix 10 device.

Being unable to have a user design configured at power up continues to be an unfortunate obstacle for us, we currently use the platform by manually configuring the FPGA through Quartus Programmer with each power cycle.  This reduces our efficiency and costs us money at test facilities.

I flipped through the remote system update documentation that you linked, I'm not sure that I completely follow it all but it seems pretty complicated and looks like I would need to obliterate the factory image currently in all the boards which makes me nervous to do.  The design files for factory recovery of the S10 L-tile GX dev kit is not available on the Intel website, only the H-tile design package is available for download, and thus I would not be able to restore our boards to their factory state should the remote update process not work for some reason.

Personally I'd prefer to wait for Intel to figure out how to do it with the S10 board as shipped from the factory.  If Intel is unable to figure out how to do it, we may revert to the Arria 10 boards and forget about the S10 boards, though it would be unfortunate to have to eat that cost as we purchased several of them, not thinking loading a user design would be a challenge.

[EBERLAZARE_I_Intel]

Hi,

Thanks for the update.

In that case, we will hold the RSU design and work towards the Board Update Portal script fix.

I believe, getting the .bin files properly converted will fix the issue. We are still working on getting the fix for the syntax error for the script.

This may take some time, and I appreciate your patience on this. We apologies for the inconvenience out of box experience you are having currently.

[ChrisConger]

Thank you for your continued support and am happy to help in any way that I can as your team comes up with potential fixes.

I know I've been frustrated with the board, but I hope it hasn't been mistaken for frustration with you personally.  As I said I truly appreciate you and your team's help here, we are a small customer and I don't expect Intel to bend over backwards for us.  Any help or solutions you provide will help us immensely, and I stand ready to help you guys in any way that we can.

[EBERLAZARE_I_Intel]

Hi Chris,

Not a problem, we would like to help our users to get the best experience, we apologies for any inconvenience.

We are working now on finding the right fix for the S10 boards starting with the script itself.

In the meantime, just to reiterate, it would require first the .sof to .pof of your design. By using the Quartus PFG not Quartus CPF, I think. We do need to get the .hex for the bootloader using the Quartus PFG however, for S10 steps, we have the build flow here to get one:

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloader

Then convert the .pof to .bin for the Board Update Portal.

But the side is currently down.

We will keep you updated on anything from time to time, we appreciate your patience.

Just to check again, you are facing this syntax previously?:

xxd: ghrd_1sx280lu2f50e2vg.pof: No such file or directory

expr: syntax error: missing argument after ‘length’

expr: syntax error: unexpected argument ‘2’

dd: invalid number: ‘’

Object file generated successfully!