Create a Block Symbol File from a Verilog Code in a Cyclone 10 GX board.

[SATC]

Good afternoon guys, I'm trying to create a schematic block file of the program I made, but the option appears as "disabled". I am using the Quartus Prime Pro Edition IDE, I have tried to generate this file for many different projects and this option is not always available. Does anyone know if anything needs to be enabled in the Quartus Prime settings? I used the same programs in Quartus II 13.0 and it worked. Apparently the problem is occurring when I use the prime version.

Below is an image to illustrate the unavailability situation.

[Vicky1]

Hi,

your intended feature is"Create Symbol files from current file" might be removed from Intel Quartus prime pro edition but it it still available in Lite & Standard edition of the Quartus tool, please refer the below screenshot of Q18.1std edition.

In fact, here none of the feature is active under 'Create/Update' option for Quartus Prime Pro edition & it seems to be a bug, let me check with team internally & it may take some time to fix that issue.

Regards,

Vicky

[SATC]

Hi Vicky, the same error is also found in Quartus Prime 17.1 version beyond 19.1

[SATC]

Any news on this subject?

[Vicky1 · Accepted solution]

Hi,

Apologies for the inconvenience, I have already raised this concern to next level & it might take some time.

Regards,

Vicky.

[User1010]

Hi, may I know what's the status of this solution? I am currently using Intel Quartus Prime Pro Edition 22.1, but I am still unable to create symbol from my vhd file. How can create symbol from my vhd code as a black box?

[SATC]

I tried on the 18.1 version of Quartus Prime Pro and the bug also remains. This version of the quartus you used was Standard, but it does not support to Cyclone 10 GX.

That way, I appreciate your contribution and look forward to the new Quartus update.

[FPGAYE]

Hello, this same issue is always there in 2021

[sstrell]

You can't in Pro.  The feature does not exist.  As mentioned, you could install Standard to do this, which is a pain, but it would work.

[User1010]

Hi sstrell,

Thank you for the reply. May I know if this feature doesn't exist, (other than doing it on the standard version), how can I go about building my project if I needed to design a huge project with many modules that contain my own VHDL code? I am using an Agliex F-series board, so I can't use the standard edition. 

[sstrell]

You’d have to write code and perform manual instantiations in that code instead of using a schematic.