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Cyclone 10 GX Dev Kit BTS SFP+ Loopback

Honored Contributor II

I have the Cyclone 10 GX FPGA Dev kit. With the Board Test System (BTS) running, I have the board configured with the "XCVR Design - PCIe, SFP+" example. I can't seem to get the SFP+ ports to loop back to themselves through SFP+ transceivers. 


Under PMA Setting, if I enable "Serial Loopback" for both SFP+ channels, the test runs fine, with 100% showing in both the TX and RX bars. This is looping back inside the FPGA itself. That's great, but not very interesting in the real world. 


However, when I use actual SFP+ transceivers and fiber cable, I get nothing. Not a blip. The TX bar goes to 100% and the RX bar sits at 0%, with the "Bits" counter sitting at 0. 


I have tried two different SFP+ transceivers. Both are by Finisar. One is a FTLX1475D3BCL single-mode, and one is a FTLX8574D3BCL multi-mode. In each case, I have a short (~1 meter) single- or multi-mode fiber cable connecting the transceiver's TX to its own RX. Both are rated for 10 gig ethernet operation. 


In the PMA Setting dialog, there are lots of analog parameters that you can set. I admit I am a novice in this arena, so I don't have much intuition as to what to set these to. However, I have tried various (admittedly random) combinations of settings. High, low, positive, negative, whatever. I haven't seen RX get off of zero at all. 


Has anyone else played with this and had better luck? 


For what it's worth, I've tried the FMC Design configuration with the FMC loopback board that was included with the kit, and it seems to work perfectly with no modification to the default PMA settings.
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There are two i2c I/O expanders which drive TX_DISABLE signals to SFP+ cages. You need to use an i2c controller to program them via SDA/SCL wires, which are connected to the FPGA.

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