Cyclone 10 LP FPGA

[Annu]

Could you please elaborate on the ESD protection provided in the Cyclone 10 LP devices(Other than the data provided in the platform(ESD Performance (intel.com)).

[AqidAyman_Intel]

Hello,

There are limited information regarding the ESD in FPGA devices.

However, I found several Knowledge Base article that mention on this. Refer below link:

• https://www.intel.com/content/www/us/en/secure/support/programmable/articles/000081593.html
• https://www.intel.com/content/www/us/en/support/programmable/articles/000078184.html
• https://www.intel.com/content/www/us/en/support/programmable/articles/000074086.html

[FvM]

Hi,
two of the three links are dead or re-linking to outdated Altera links.
The third link however has valid information: refer to IBIS data to get the ESD diode characteristics. Thanks!

@ Annu: Can you elaborate what kind of information you are specifically looking for?

[Annu]

Do we need to provide additional ESD mechanism if static discharging voltage is at 15 kV. Could you please reply. What is the maximum static discharging voltage Cyclone 10 LP can withstand without any further grounding or shielding??

[AqidAyman_Intel]

I think, since the datasheet for Cyclone 10 LP has shown that the passing voltage for GPIO using Human Body Model (HBM) is +-2000V and using Charged Device Model (CDM) is +-500V, then if static discharging voltage is at 15 kV, it may need additional mechanism to withstand the ESD event.

[AqidAyman_Intel]

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