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Cyclone 10 gx PCIe with DDR3 interface through BAR[2] using avalon mm dma reference design not able to map the bar.? fpga_dma 0000:01:00.0: could not map BAR[2]

senjd
Novice
758 Views

Hi

I am using cyclone 10 gx, used example from below

(document of reference design : https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an829.pdf)

Reference Design : (Gen2x4)

https://fpgacloud.intel.com/devstore/platform/2183/

 

So, i downloaded this reference design, synthesized on Quartus 18.0.

then flashes the bit file. after that power on the pc where installed the cyclone 10 gx card.

 

Used lspci -vvv to detect pci. got the following. Bar doesnt mapped properly.

01:00.0 Non-VGA unclassified device: Altera Corporation Device e003 (rev 01)

  Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-

  Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-

  Interrupt: pin A routed to IRQ 11

  Region 0: Memory at <ignored> (64-bit, prefetchable) [disabled] [size=512]

  Region 2: Memory at <unassigned> (64-bit, prefetchable) [disabled] [size=2G]

  Region 4: Memory at ef201000 (32-bit, non-prefetchable) [disabled] [size=16]

  Region 5: Memory at ef200000 (32-bit, non-prefetchable) [disabled] [size=16]

  Capabilities: <access denied>

  Kernel modules: altera_cvp

 

 

Then loaded the altera driver. & did dmesg. got the following errors.

 

[ 237.807673] altera_dma 0000:01:00.0: could not map BAR[2]

[ 237.807679] altera_dma 0000:01:00.0: can't enable device: BAR 0 [mem size 0x00000200 64bit pref] not assigned

[ 237.807680] altera_dma 0000:01:00.0: pci enabled device failed

[ 237.807682] altera_dma 0000:01:00.0: err_enable

[ 237.807683] altera_dma 0000:01:00.0: err_bk_alloc

[ 237.807688] altera_dma: probe of 0000:01:00.0 failed with error -22

 

BAR mapping after loading the driver.

[ 237.807134] fpga_dma: module verification failed: signature and/or required key missing - tainting kernel

[ 237.807509] fpga_dma 0000:01:00.0: BAR[0] 0x00000000-0x000001ff flags 0x2014220c, length 512

[ 237.807510] fpga_dma 0000:01:00.0: BAR[1] 0x00000000-0x00000000 flags 0x00000000, length 0

[ 237.807512] fpga_dma 0000:01:00.0: BAR[2] 0x00000000-0x7fffffff flags 0x0014220c, length -2147483648

[ 237.807513] fpga_dma 0000:01:00.0: BAR[3] 0x00000000-0x00000000 flags 0x00000000, length 0

[ 237.807514] fpga_dma 0000:01:00.0: BAR[4] 0xef201000-0xef20100f flags 0x00040200, length 16

[ 237.807515] fpga_dma 0000:01:00.0: BAR[5] 0xef200000-0xef20000f flags 0x00040200, length 16

[ 237.807536] fpga_dma 0000:01:00.0: BAR[0] mapped to 0x00000000e7a7e46e, length 512

  

As you can see, BAR[2] size is not mapped properly.

Any problem with pcie configuration which is (vendor id : 1172, device id : e003)

BAR 0 : 64 bit prefetchable memory (size :automatic assign to 4 bit )

BAR 2 : 64 bit prefetchable memory (size :automatic assign to 31 bit)

 

DDR3 Memory

Anyone faced the same issue?

Any helps appreciate most.

 

 

 

 

 

0 Kudos
4 Replies
Nathan_R_Intel
Employee
174 Views
Hie, I will try the reference design on the Cyclone 10 development kit today and update if i am facing the same issue. Regards, Nathan
senjd
Novice
174 Views

Hi Nathan, Thanks for your reply.

Please let me know if you will face the same or if it will work.

Nathan_R_Intel
Employee
174 Views
Hie, I had some problems detecting the device on my linux workstation. I am getting a new linux workstation tomorrow and will try it on. I will get back to you in 1-2 days on whether I am facing the similar problem. Regards, Nathan
Nathan_R_Intel
Employee
174 Views
Hie, My apologies, I provided an update sometime back, but it seemed did not get into the system. I checked with the reference design using Quartus Prime Pro 18.0 and did not observe the mentioned error. Could you attach your reference design, for me to check. Regards, Nathan
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