I guess I didn't properly ask the question: does the builtin USB Blaster II connect via JTAG to the cyclone 10 chip's JTAG pins? It was not about tethering in general but about the specifics of how JTAG is done on this specific evaluation board.
I spent this morning pouring over the schematics of the board and did find the answer. This is what I found out: the USB Blater functionality is implemented by a cypress microcontroller which does output JTAG pins. These signals are sent to the MAX 10 FPGA. In addition the JTAG signals from the external JTAG port are also sent to the MAX 10 FPGA. A set of signals from the MAX 10 FPGA go to the JTAG pins of the Cyclone 10 FPGA. The MAX 10 is acting like a 2:1 mux for the JTAG signals. There is a switch SW1.4 which chooses whether the USB Blaster or the JTAG port connects to the Cyclone 10 FPGA.
So it looks like the answer is that as long as the switch is set the correct way the USB port is sufficient to both program the Cyclone 10 AND do the tethering for IP.
John S.
