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Cyclone 10LP not programming with JTAG

jaguilar
Novice
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Hi,

I have been working with a board with a Cyclone 10LP (10CL010YE144I7G). Everything was working fine and one day I came and I wasn't able to program it. I'm using an Altera USB blaster which was also working fine for the JTAG programming. The only error I get when trying to program is: Error (209040): Can't access JTAG chain.


I have tried updating the USB blaster drivers and using a different blaster to be sure that the blaster is not the problem. I'm using a scope to visualize the TCK, TMS, TDO and TDI signals while I try to connect and program it. The figure below shows TCK (yellow), TMS (pink), TDI (green) and TDO (blue). I was able to check some of the pins with VCC to be sure that the FPGA is being powered correctly and it seems ok. 

scope_24.png

 

I would like to know if my FPGA is still working or if it's dead and I have to replace it. And if it is still working what could be the reason behind this failed connection?

Thank you,

 

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jaguilar
Novice
246 Views

Hi lixy,

 

The board isn't the evaluation kit from Altera, it was designed by someone else. Thank you for your response, it turns out that the FPGA was dead. I had it replaced and everything works again.

 

Best regards,

View solution in original post

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6 Replies
lixy
Employee
305 Views

Hi jaguilar,


1- What is this board? Is it a board designed by yourself, or a evaluation kit from Altera? https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/cyclone/10-lp-evaluation-kit.html

If it is our development kit board, it is easier for us to understand the schematic.

If it is not our development kit, what is the FPGA configuration scheme on board? For example, is it AS, PS or FPP?

https://www.intel.com/content/www/us/en/docs/programmable/683777/current/configuration-and-remote-system-upgrades-25917.html

2- As you mentioned that "I was able to check some of the pins with VCC to be sure that the FPGA is being powered correctly and it seems ok", does it mean the power supply and function of the original FPGA logic was working normally? To better understand the status of the FPGA, you may also check the waveform of nSTATUS, CONF_DONE signals of the FPGA after power on the board to understand if it could be configured normally.

3- In Quartus/Programmer window, could you open the "Tools --> JTAG chain debugger ", then click on "Test JTAG chain" to see what is showing in the session log?


Best Regards,

Xiaoyan



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jaguilar
Novice
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Hi lixy,

 

The board isn't the evaluation kit from Altera, it was designed by someone else. Thank you for your response, it turns out that the FPGA was dead. I had it replaced and everything works again.

 

Best regards,

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FvM
Honored Contributor II
285 Views

Hi,
I wonder why TDO shows only 1 V output level. The signal won't be recognized by USB Blaster running with 3 or 3.3V Vcc,target.
There are several possible reasons why TDO voltage is too low

- damaged FPGA TDO pin

- additional component at TDO node i sshorting output
- USB Blaster defect, apparently excluded by testing with different devices

Regards

Frank

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jaguilar
Novice
246 Views

Hi FvM,

 

I was also wondering if the 1 V output level was normal for this board. We solved this problem replacing the FPGA. After replacing it I still got 1 V output for TDO and I was able to program the FPGA so I'm assuming it is "normal" for this board, something at the node is probably shorting the output (which I know is not ideal). Thank you for your response.

 

Regards,

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FvM
Honored Contributor II
240 Views

Hi,
1V TDO level isn't normal because it's not necessarily recognized as high by programming adapter with Vcc,target of 3 or 3.3V which requires 2.0 V Vih.

Can you tell the board type?

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jaguilar
Novice
140 Views

Hi,

Unfortunately the board was designed by someone else and I don't have a lot of details about it more than the printout. However, the problem is solved for now and I will take this problem into account for future versions of the board.

 

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