Hello,Did any body used FTDI chip in Cyclone III dk (EP3C120F780C7N) for PC communication. Altera website claims USB2.0 communication in their link (http://www.altera.com/products/devkits/altera/kit-cyc3.html). But the kit did not shipped with any reference designs. Please provide any suggestions or help if you had worked on USB-PC communication for Cyclone III dk Thanks in advance, Trinath
Sorry, I don't have an answer but a similar question... What is the easiest way to read the contents of the SDRAM through the FPGA or USB Blaster from a PC? Any help is greatly appreciated.
We have used SLS USB 2.0 IP Core to have a USB communication between the Cyclone III kit and PC. But we did not use the USB port on the board, but additional boards with the PHY. The set up looks like in the picture http://www.slscorp.com/images/ref_design/setup/onbrd_device_b.jpg and http://www.slscorp.com/images/ref_design/setup/h3sum_utmi_a.jpg
Is it possible to let communication b/w PC & board with the USB/Ethernet ports on the development board?Or the ports on board are only reserved for configuration of FPGA?
I do not know about Ethernet, But yes. USB was used for configuration only. Altera suggests some procedure to use the Cypress device. But, it is not straight forward.
Nazia,What's the type of this additional board? http://www.slscorp.com/images/ref_design/setup/onbrd_device_b.jpg I can't find it on the website of http://www.slscorp.com/ (http://www.slscorp.com/images/ref_design/setup/onbrd_device_b.jpg). Is it provided by other company? Please help me.
Whether is it okay for usb communication by only using this board with Cyclone III FPGA development board?Do I also need another board http://www.slscorp.com/pages/usb2sls.php to make usb communication work? I can't find the providers in China for the later board USB 2.0 UTMI (CY7C68000 PHY). Does anybody know where to buy it? Thank you for your reply!
Any of those two boards should do. You don't need anything else on the hardware side, but you'll need an IP to put in the FPGA to handle the USB protocol itself.
You have a list of third party IPs here:http://www.altera.com/products/ip/ip-index.jsp There are a few USB cores. I expect that none of them are free, but you may be able to get an evaluation version.
Thank you very much!I'm a newbie in FPGA usb communication. My application is using FPGA for high speed data acquisition, and the data will be transfered to a laptop by USB communication. Which one of the IP list is preferred?
I don't know these cores, but it seems that the main difference between them is the supported USB protocol version (1.1, 2.0 or 3.0) and whenever the core can act as a host or a device.If you have the option to make your own extension board, something with an FTDI chip could be simpler. Or as an alternative in theory it should be possible to reconfigure the MAX II CPLD to use the existing USB port for something else, but I don't think it is documentet anywhere... and of course you would loose the embedded USB blaster function.