Hi guys.So i bought a Cyclone III Starter kit and Santa Cruz Video Input Daughter Card with the TVP5146 Video Decoder chips. I also bought a HSMC E-Gasket card availiable from SLS. Now the E-Gasket sits between the HSMC interface on the Starter Kit, and the Santa Cruz on the Daughter Card and Maps all the pins to the FPGA. Now the Video Daughter Card interfaces on 3.3V I read in the Cyclone III manuals that for a 3.3V input driver you need to calculate a series impedance to match the line and configure it in the FPGA. It says this series impedance must be considered even if you are mapping a 3.3v to 3.3v bank and it is to prevent voltage overshoot and damage to input pins. The problem then is that the Manual for the Video Daughter Card does not specify impedance information for its outputsm, also that i can't find an IBIS model for the daughter card. If anyone can help with this situation i will be quite greatful. Thanks guys.
Setting the FPGA outputs to minimum current strength gives a suitable impedance for many applications. A series termination can't be assigned for 3.3V LVTTL as far as I know.
That is good advice for the outputs frome the fpga to the video card.I am also worried about the outputs from the video daughter card to the fpga. As i have no control over the current levels leaving the daughter card. This card is designed to be used with the cyclone 2 dsp kit, so it will probably be safe to use if i use the same style inputs as in the cyclone 2 project. I'm going to give that a chance.
I would expect any well-designed daughter card to use appropriate source sided signal termination. The requirement applies for Cyclone II as well. Comparing the specified maximum input ratings, there is no beig difference between EPC2 and EPC3. Cyclone III has additional duty cycle specifications for overvoltage because of more sensitive chip technology.To know exactly, you should check the signals with an active probe.