Cyclone IV GX, DDR decoupling

[Altera_Forum]

Hi,  

 I'm actually doing schematics using the cyclone Iv gx evaluation board. I placed the same DDR2( Mircon MT47H16M16) but I wonder why there are only 40 caps (10x4 CN caps) when micron says to put caps on every signals ?   Are theses caps only needed for DQ DQS and DM ?

[Altera_Forum]

Post the schematics, but I suppose You're talking about caps after termination resistors to Vref?

[Altera_Forum]

Yes, I'm talking about caps after termination resistors to Vref. 

Look page 11 on the attached schematic, it deals with CN3,CN4,CN9,CN11,CN2,CN1,CN15,CN17,CN16 and CN8.  Thank you

[Altera_Forum]

These are required, but not necessary. The more, the better, but usually there is no requirement to overload the PCB with caps.

[Altera_Forum]

Ok, fine. 

 However, if these caps are required but not necessary, for which signals are they required for, to the extent there are only 40 caps but 61 ddr2a signals ?

[Altera_Forum]

These caps are placed to keep Vref plane as much clean as possible. You should add a cap near every termination resistor, but since You're probably using resistor networks (at least I did), then place at least one cap per resistor network. The common approach is to place 3 caps near one resistor network with values: 100nF, 10nF, 1nF.

[Altera_Forum]

Understood. Thank you for explanation.