Cyclone V FPGA - DE0 Nano board SDRAM address

[RajeevH]

Hi, 

I am using TerASIC's DE0-Nano board to develop a bare-metal application running in the SDRAM using ARM DS5 tools. 

Unfortunately, I am unable to find out the exact memory for the SDRAM that is on board. The examples provided are for some other board.

SDRAM 0x00100000 0x40000000
{
VECTORS +0
{
* (VECTORS, +FIRST)
}

APP_CODE +0
{
* (+RO, +RW, +ZI)
}

; Application heap and stack
ARM_LIB_STACKHEAP +0 EMPTY (0x40000000 - ImageLimit(APP_CODE))
{ }
}

I get an error when I use this. I would like to know the from where the SDRAM starts and ends.

--Rajeev

[aikeu]

Hi Rajeev,

Sorry for late reply,

Do you still require help for this?

Thanks.

Regards,

Aik Eu

[aikeu]

Hi Rajeev,

I will close this thread if there is no more help needed.

Thanks.

Regards,

Aik Eu

[aikeu]

Hi RajeevH,

We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Thanks.

Regards,

Aik Eu