FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
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Cyclone V GT development board

Honored Contributor II



I am debugging a project that I built on the Arria V with the VIP suite and am struggling to get any of the sample projects for the Cyclone V GT board to work.  


There were some threads a while back that helped me with the JTAG issue so I can now program it effectively through the JTAG hard interface not the USB connection.  


Does anyone else have issues verifying a design with the memory interface? I have tried the Video Reference design for version 15 and 16.1 but with no luck and don't see any changes to the read and write to the DDR3 using the memory interface tool kit. My Arria V board cooperates so I don't think it is my mistakes at this point. 


We bought this board a few months ago for a project I am developing so I have been using it in the lab but this is the first time I am concerned about the board functioning properly. It also has some odd interfaces that I wasn't expecting like the LCD connection which is i2C and not the standard interface so there isn't a regular module in Qsys for talking with it. 





Sr. Design Engineer  


--- I'm a ramblin gamblin, HECK of an ENGINEER!
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