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Cyclone V, problem when the JTAG configuring flash MT25QL256(micron) with .jic

NAdel1
Novice
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I understand that the jtag puts some SPI controller in the FPGA to talk to the flash, but i see that before the jtag configuring the flash, the FPGA check something in the flash before it puts .jic in it.

what is it checking there(read ID, read non-volatile register,...)?

I ask because i can read/write to the flash with my design but i can't access with jtag, not even verify or blank-check because after it puts the SPI controller in the FPGA it "failed".

 

 in addition, I saw that the jtag configures the non-volatile register in the flash. Just saying.

 

JT

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ShafiqY_Intel
Employee
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Hi NAdel1,

 

MT25QL256 device is used 4-byte addressing. Thus, Quartus Progammer set the non-volatile configuration register (NVCR) during programming operation.

However, if you are using a third party programmer, you need to set the register manually.

 

Cheers

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NAdel1
Novice
596 Views

​Thanks for your response.

I understand that the flash's Non-Volatile Register is configuring during the process.

My question is more specific, the SPI controller that the JTAG puts in the FPGA read something from the flash and if it don’t like it, the 'flash loading' "failed".

What the SPI controller reading before loading the flash? 

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ShafiqY_Intel
Employee
596 Views

Hi NAdel1,

 

I'm apologize for late reply. I'm AFK for couple of days.

 

To understand better regarding this, go to Quartus > File > Convert Programming File.. In Programming file type option choose JTAG Indirect Configuration file (.JIC).... Then, select "..." option:

... option.JPG

 

Then, you select the reference for MT25Q01G device

... option 2.JPG

 

Here, you can understand how it have been Initialization, Program, Erase, Verif/Blank-Check/Examine, and termination.

... option 3.JPG

 

I hope found this informative.

 

NOTED: This feature only avalaible in Quartus 18.1.1 (standard version) / Quartus 19.1 (pro version) onwards.

 

 

Cheers.

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