FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5931 Discussions

CycloneIII starter kit - basic question (clock)

Altera_Forum
Honored Contributor II
1,286 Views

Hi all, 

I am using the CycloneIII starter kit. I suppose that my question is general for any kind of dev kit. I am trying to run a simulation using the SignalTapII file. I think that I have a problem with the main clock definition since when I run the simulation, I get a "waiting for clock" message in the "Status" window and nothing happens. How exactly am I supposed to defined the clock? 

 

Thanks, 

Dvido
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
366 Views

SignalTap II is hardware debugging rather than simulation. 

 

The SignalTap II clock input must be connected to a functional clock in your design, e.g. the 50 MHz crystal clock at Pin_V9.
0 Kudos
Altera_Forum
Honored Contributor II
366 Views

why V9? the manual says B9. I connected the clock to B9 but the rsult is still the same.

0 Kudos
Altera_Forum
Honored Contributor II
366 Views

Yes, both pins are connected to the 50 MHz on-board oscillator, so either should work. 

Unfortunately I can't guess, what you did wrong with your Signal Tap II instance without knowing the design (top level, pin assignments and Signal Tap). You may want to post a Quartus design archive.
0 Kudos
Altera_Forum
Honored Contributor II
366 Views

So what is my next step? 

Maybe you know some kind of a manual for configuring SignalTapII files?
0 Kudos
Reply