CycloneV FPGA 可以通过什么将差分输入的信号转为单端的，谢谢。

[smeng12]

请问下，CycloneV FPGA 可以通过什么将差分输入的信号转为单端信号；

有没有IP，原语，可以实现的呢；

或是ExampleDesign作参考；

可以实现差分信号输入转为单端的呢，谢谢。

[EngWei_O_Intel]

Hi Shawn

I am not sure if I interpret your question correctly. Are you asking to convert differential signal to single ended signal?

The differential signaling is generally at the IO portion. The signal inside the FPGA is single ended. You  need to assign your input/output pin with differential IO standard and placed them to differential pins.

Thanks.

Eng Wei

[EngWei_O_Intel]

Hi Shawn

We do not receive any response from you to the previous reply that have been provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Eng Wei