CycloneVsoc GPIO multiple use question

[CAlex]

Hi

I have some questions about the pin multiplexing of this SOC. On the HPS component, I can choose to use set0, set1 or set2 of the UART pins (taking UART0 as an example), but according to the CyclonVsoc design diagram, only set2 of the GPIO is connected to UART_TX and UART_RX, and because this is a hardware-connected circuit, it cannot be changed by Pin Planner. Does this mean that if I want to use UART0, I have to use set2?

picture 1: HPS interconnection

Thank you.

[sstrell · Accepted solution]

That's a schematic for a particular board design (I'm assuming a dev kit) so yes you'd have to use whatever those pins are connected to.  Obviously, with your own board, you could choose whichever set of pins you wanted to use for the UART as long as you designed your board that way.

[EBERLAZARE_I_Intel]

Hi,

Yes, agree with @sstrell, just checking are you using the CV SoC Dev kit board?:

https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/cyclone/v-sx.html

[EBERLAZARE_I_Intel]

Hi,

Do you have any further questions?

[CAlex]

Sorry for the late reply.

All the questions I have in this thread have been answered.

Thank you.

[EBERLAZARE_I_Intel]

Hi,

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