FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

CycloneXLP device

sm110
Beginner
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It is observed that all the outputs of cyclone X Lp device goes to high state till the configuration is completed. This will be a problem when the output is driving a device which require low on power up.  How to make the outputs of the FPGA low on power up. It should be high when the user programs it. Please suggest a solution.

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FvM
Honored Contributor II
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Hi,
review device handboook to understand about weak pullup at unconfigured pins.

If you want low level at power-on, place a pulldown-resistor, e.g. 1 - 2k.

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sm110
Beginner
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Hello

 

You mean to say, whatever the output pins configured in the board, which require low level at power-on, should have a pull down resistor. Also the input pins which should be treated as low on power on should have a pull down resistor

 

 

 

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Ash_R_Intel
Employee
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Hi,

Please refer to the following page 6.3.2. Configuration Sequence (intel.com). As per it, all the I/O pins are tied to an internal weak pull-up at power up, before configuration.

Solution to your requirement will be to connect on-board pull-down resistors for the output pins which are required to be low.

For the input pins, it does not matter, because the FPGA is not configured yet.


Hope that helps.


Regards


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