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Altera_Forum
Honored Contributor I
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DAC HSMC and EP3SL150F1152C2 stratix III

Hi im stuck with my stratix III EPSL150F1152C2 and the HSMC card that came with the board.. 

 

now my question is i cant get the output on the oscilloscope and when i try with signal tap i dont get the analog waveform..all i get is binary or hexa.. 

 

i wanna know how do i configure the HSMC card to perform DAC or the FPGA itself.. 

 

please note i have assigned the pins as seen on the datasheet for HSMC and board.Do i need the clock for the DAC and if yes how do i set that.? 

 

I have the done the whole project on quartus 2 and it works fine..i have got a demo on the 17 nov 2009:My project title is CE-OFDM:mad:  

 

With kind regards 

 

JJ
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4 Replies
Altera_Forum
Honored Contributor I
67 Views

Three issues... 

 

1. If you ran the installer that came with the Stratix III DSP development kit, it will have placed files at C:\altera\80\kits\stratixIII_3sl150_dsp. 

 

2. You will need to set the DAC clock jumpers J15 and J17. Use the instructions in "data_conversion_hsmc_reference_manual.pdf" at C:\altera\80\kits\stratixIII_3sl150_dsp\documents. You can reference the board schematic at C:\altera\80\kits\stratixIII_3sl150_dsp\board_design_files\data_conversion_hsmc\schematic 

 

3. Use the working example project located at C:\altera\80\kits\stratixIII_3sl150_dsp\examples\stratixIII_3sl150_dsp_example_ChA for FPGA pin assignments, analyzer configuration, etc. 

 

Hope this helps. 

Mike
Altera_Forum
Honored Contributor I
67 Views

Okay thanks i will try to setup the jummpers..and will tell you  

 

i did run through the example without setting the jummpers:mad:
Altera_Forum
Honored Contributor I
67 Views

I did set up the pins as required (jumpper 15 and 17 pins 1 and 3 the ) but still cant get anything out.. 

 

1)is there suppose to be some input fruquency to which to run the DAC and if so what is the max or min? 

 

2)what i have noticed is that i have to use the pin names as they appear in the datasheet is that correct(i mean the naming)? 

 

3) i have chosen to use DAC_B and FPGA_CLK_B_P..my biggest worry is that even in the signal tap i cant get the analog waveforms and what i heard is that the signal tap should display what is suppose to be displyed on the oscilloscope,if i dont use the DAC will i still see the analog waveforms in the signal tap? 

 

sorry for so many questions but i really have to get this working..i have got a final demo on the 17 nov 

 

kind regards
Altera_Forum
Honored Contributor I
67 Views

 

--- Quote Start ---  

I did set up the pins as required (jumpper 15 and 17 pins 1 and 3 the ) but still cant get anything out.. 

 

1)is there suppose to be some input fruquency to which to run the DAC and if so what is the max or min? 

 

2)what i have noticed is that i have to use the pin names as they appear in the datasheet is that correct(i mean the naming)? 

 

3) i have chosen to use DAC_B and FPGA_CLK_B_P..my biggest worry is that even in the signal tap i cant get the analog waveforms and what i heard is that the signal tap should display what is suppose to be displyed on the oscilloscope,if i dont use the DAC will i still see the analog waveforms in the signal tap? 

 

sorry for so many questions but i really have to get this working..i have got a final demo on the 17 nov 

 

kind regards 

--- Quote End ---  

 

 

 

Hi, 

 

I have the same kit.  

 

DAC: 

 

If you try the example shiped with the kit, it should be work. The issue is may due to the fact that on the hsmc daughter board, there are RF transformer ( "big white cube") near the sma connectors. This transformer have a band pass located between 300kHz and 300Mhz. So the dc and lower frequencies are cut.  

 

Signal tap: I didn't use but I remember with the development kit there is a quick start guide which tell us how to run the demo of the DAC/ADC. In addition, it tells us how to use the signal tap to view the digital sinewave. 

Try to test it.  

 

Best regards, 

 

Jeremy.
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