For DDI port , should I need to use the transceiver pins(1C bank) or differential pins of 2L bank of 10AS016?
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Please see my answers as below -
1. What is the specific A10 SX part that you are using?
SBS : Full Part number is 10AS016.
2. Are you using a devkit from Intel PSG or your own board?
SBS : We are developing a new board with 10AS016.
3. Would you mind to further elaborate on the DDI port that you are referring to? Is it some interface availabe on the devkit? Some web reference or explanation on this interface will be helpful.
SBS: Yes, this DDI port is available on the Dev Kit. DP_ML_LANE_N0 is the net name used in the Devkit.
4. Please share with me also the specific data rate and requirement for the DDI port.
SBS : if DDI port works at lower speed also is fine for us.
Hi,
Thanks for your clarification on the net name in the A10 SOC devkit. As I understand it, the DDI port that you are referring are for Display Port. Based on my understanding with Display Port usage in A10 devices, generally they are connected to the high speed XCVR pins instead of GPIOs.
Please let me know if there is any concern. Thank you.
Chee Pin
okay, thanks Chee Pin
And also instead of 4 lanes of DDI ( Display port ) , can we use just 2 DDI lanes to connect the Display and does the Display Port IP supports the 2 lane implementation ?
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