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5154 Discussions

DDR LVDS over HSMC on Stratix IV GX Development Kit

Altera_Forum
Honored Contributor II
875 Views

Can the HSMC interfaces on the Stratix IV GX development board support 500 MHz (1000 GBPS) DDR LVDS?

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3 Replies
Altera_Forum
Honored Contributor II
115 Views

 

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Can the HSMC interfaces on the Stratix IV GX development board support 500 MHz (1000 GBPS) DDR LVDS? 

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I don't see why not.  

 

I have been using the transceivers at 5Gbps and higher. Assuming the LVDS layout is good, you should be fine. 

 

I've tested the Stratix II LVDS at 1Gbps. I would expect the Stratix IV to work fine. 

 

What are you interfacing to? 

 

Cheers, 

Dave
Altera_Forum
Honored Contributor II
115 Views

Dave, 

 

Thanks for your reply. 

 

Yes, it's the LVDS routing of the Stratix IV GX development board that I'm concerned with. I would like to know if it is good enough for 1 Gbps. 

I'm interfacing to an Analog Devices AD9434 12-bit 500 MSPS ADC. It supports both SDR and DDR transmission. I'll use the SDR mode at first but would like to try the DDR mode, as well. 

http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad9434/products/product.html 

 

Andy
Altera_Forum
Honored Contributor II
115 Views

Hi Andy, 

 

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Yes, it's the LVDS routing of the Stratix IV GX development board that I'm concerned with. I would like to know if it is good enough for 1 Gbps. 

 

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It should be. Do you have the board? If you don't, I could probably test the boards I have. But I wouldn't get a chance to until next week sometime. Unless of course you have a test design, that has a nice testbench, so that I can see the design, then I'll download it :) 

 

 

--- Quote Start ---  

 

I'm interfacing to an Analog Devices AD9434 12-bit 500 MSPS ADC. It supports both SDR and DDR transmission. I'll use the SDR mode at first but would like to try the DDR mode, as well. 

http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad9434/products/product.html 

 

Andy 

--- Quote End ---  

 

 

Does your design provide a frame clock for the LVDS demux logic? 

 

Read these if you don't know what I'm talking about: 

 

http://www.ovro.caltech.edu/~dwh/carma_board/at84ad001b_tests.pdf 

http://www.ovro.caltech.edu/~dwh/carma_board/digitizer_tests.pdf 

 

Cheers, 

Dave
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