I cannot make this work under QU12.1 and QSys. Memory is MT46V16M16.If I add the SDRAM Controller to the System it implements all but the DQS0 and DQS1 wires ??? The Ref Designs don't help because the used SDRAM controller does not work under QSys. Anyone point me in the right direction please? Thanks, Friedrich
I'm not sure if Altmemphy supports Cyclone II (Uniphy does not support Cyclone II that's for sure). There was a memory controller called the "Legacy DDR SDRAM controller" which was supported by I doubt that was ported to Qsys.