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DDR SDRAM on the Nios Development Board, Cyclone II Edition

Altera_Forum
Honored Contributor II
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I cannot make this work under QU12.1 and QSys. Memory is MT46V16M16.  

If I add the SDRAM Controller to the System it implements all but the DQS0 and DQS1 wires ??? 

The Ref Designs don't help because the used SDRAM controller does not work under QSys. 

Anyone point me in the right direction please? 

Thanks, Friedrich
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Altera_Forum
Honored Contributor II
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You're trying to add SDR SDRAM controller for DDR SDRAM memory chip? That will not work. Add DDR memory controller.

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Altera_Forum
Honored Contributor II
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I'm not sure if Altmemphy supports Cyclone II (Uniphy does not support Cyclone II that's for sure). There was a memory controller called the "Legacy DDR SDRAM controller" which was supported by I doubt that was ported to Qsys.

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