FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

DDR3 Timimg requirements

Altera_Forum
Honored Contributor II
880 Views

Hi, 

What changes should be done to meet DDR3 Timing requirements if I am migrating my project from use of EP2AGX125EF35c4 as FPGA to EP2AGX125EF35i5 as FPGA ?
0 Kudos
0 Replies
Reply