FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

DDR4 controller DQS pins

User1580871742356367
593 Views

I wonder if the polarity of DQS signal can be inverted inside FPGA (not HPS), for example, bank 3F or 3H. 

The DQS_P and DQS_N connection are reversed at one DDR4 device side and there 4 DDR4 devices forming a 64 bit memory bank. 

Hope to hear from ASAP. Thank you.

0 Kudos
4 Replies
AdzimZM_Intel
Employee
583 Views

Hi Sir,


Thanks for posting your question in Intel Community.


Unfortunately, you cannot change the polarity of the DQS signal.


Regards,

Adzim


0 Kudos
User1580871742356367
564 Views

Hi Adzim,

 

Appreciate quick response.

I know the DQS P/N pins can not be changed or swapped.

I meant inverting DQS in the VHDL or Verilog code, for example, somewhere in the MIG, like put a NOT gate.

ASAP, thank you.

0 Kudos
AdzimZM_Intel
Employee
515 Views

Hi Sir,

 

I don't think you can do that due to timing related issue.

Besides, the signals are harden circuitry that you not able to change it.

 

Regards,

Adzim

0 Kudos
sstrell
Honored Contributor III
540 Views

I'm presuming you're using a hard controller and PHY.  If so, no, you can't do that.  You wouldn't want to either due to extra delay.

0 Kudos
Reply