Hi all, I want to use the EPCS on the DE0-Nano board to configure the FPGA and boot Nios II from it. I am using Quartus Prime 15.1. I found that if I enable compression for the sof file when generating the jic file, Nios will not boot. If I don't enable compression, it will boot normally.I think there might be a problem with the sof2flash tool. So no matter I use the --compress or not, the flash file will have the same size. I look in the Nios II Flash Programmer User Guide, which says that --compress is only available for Cyclone II, III, Stratix II, III. I am wondering if my problem is related to the sof2flash tool. Or are there any other settings related to compression need to be changed? Thanks!
I am doing the same thing with you but for me no matter I compress or not, the software is not boot after reset.In your case, the software is load if not compress, right? How did you do that? Did you follow this tutorial? ftp://ftp.altera.com/up/pub/altera_material/15.0/tutorials/de0-nano/using_de0-nano_flash.pdf Is there any bugs in the tutorial? I also follow it but not work for me.
Thank you ylfyfAccording to the document, the method stated there is for the Cyclone V. But FPGA in DE0 Nano is Cyclone IV E. Is it ok to follow the method?
--- Quote Start --- Thank you ylfyf According to the document, the method stated there is for the Cyclone V. But FPGA in DE0 Nano is Cyclone IV E. Is it ok to follow the method? --- Quote End --- It's a general method. Only the first two steps apply to V series (and when used with Quartus II 13.0), so you can skip them and start from step 3.
Thank you very much yflyfYour document has the following step 8 - 10 that isn't described in ftp://ftp.altera.com/up/pub/altera_material/15.0/tutorials/de0-nano/using_de0-nano_flash.pdf. 8. Click the “Add Hex Data” button 9. Select “Relative Addressing” 10. Select your <project>.hex file containing your Nios II software image However, I have tried all of them but still not work :(