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DE0-Nano - Quartus Lite 17.1 - Error (209040): Can't access JTAG chain

Altera_Forum
Honored Contributor II
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Hello,  

 

I am trying to use a DE0-Nano for basic training but I am stuck on the Programming Device task, basically because it fails with the error 

 

error (209040): can't access jtag chain 

 

Quartus 17.0 Lite edition is running on a Debian system. 

The DE0-Nano setup has been previously built from the Windows Tool De0-Nano System Builder. 

 

To start with I wrote this simple Verilog file: 

 

module binout(clock, a, b, OUT); input clock, a, b; output reg OUT; reg cntr; initial begin assign cntr = 0; end always @(posedge clock) begin if(a) begin cntr = cntr + 1; end else if(b) begin cntr = cntr - 1; end OUT = cntr; end endmodule 

 

from which I built a Symbol File (without any error), to include in a basic block design (bdf file). 

Then, when I choose to program the device, everything seems OK (I attached a screenshot of the Program Device window), but clicking on "Start", the task always return the mentioned error. 

 

What could be wrong in my setup ? 

Thank you in advance. 

S. 

 

https://alteraforum.com/forum/attachment.php?attachmentid=14751&stc=1
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Altera_Forum
Honored Contributor II
772 Views

Hi, 

 

Have you connected the USB blaster?Check the working of usb blaster. 

 

Check the following threads which address the problem. 

http://www.alteraforum.com/forum/showthread.php?t=21942 

https://www.alteraforum.com/forum/showthread.php?t=1257 

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd03312011_647.html 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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Altera_Forum
Honored Contributor II
772 Views

Hello, 

 

As shown in the attached picture, the device was/it's connected to the computer. 

I already saw the links you posted, but all of them refer to hardware related problems (seems reasonable but not for a development kit). 

 

Last time I tested the De0-Nano was no more than 2 years ago, and it was working properly. 

Until now, the board has rested in it's case... 

 

Regards, 

Simon
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Altera_Forum
Honored Contributor II
772 Views

Hi, 

 

1.Probe the TCK signal to ensure it is a clean signal with no overshoot, undershoot,or ringing. For a chain of devices, you should probe each device in the chain as 

close to the TCK pin as possible. Noise on any of these pins could cause JTAG programming to fail for the entire chain? 

2.Check the passive components in power supply path? 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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