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Altera_Forum
Honored Contributor I
831 Views

DE0-Nano SDRAM Nios II JIC file won't work

Hello 

 

I have configured my Nios II with SDRAM (no on-chip memory) with SOPC Builder on my DE0-Nano board (EP4CE22F17C6). All the code I wrote in Eclipse works perfectly when it's loaded from there. 

 

To run my code from the EPCS64 chip I did the next steps: 

 

- Right click the main project folder (not the BSP one) in Nios II 

- Make Targets 

- Build... 

- Mem Init Install 

- Build 

- Then in Quartus, click the Compile Design button to get a SOF file that includes the FPGA configuration and the Nios Firmware. 

- Then convert the SOF file into a JIC file by going to the File menu, Convert programming files 

- Selected the SOF file and the correct FPGA model 

- With the newly generated JIC file I programmed the EPCS64 

 

After that, it seems that the Nios firmware is not being loaded. 

 

Is this the correct method to program the EPCS64 when using SDRAM as the main memory for the Nios CPU? 

 

Thanks!
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2 Replies
Altera_Forum
Honored Contributor I
67 Views

It seems that I have to add an EPCS Serial Flash Controller in the SOPC module. By doing so, I will be able to move firmware from the EPCS to the SDRAM that the Nios is working with. 

 

More info here: 

http://www.altera.com/literature/ug/ug_embedded_ip.pdf
Altera_Forum
Honored Contributor I
67 Views

An awesome tutorial on how to achieve this: 

 

https://sites.google.com/site/fpgaandco/niosii-standalone
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