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DE1 VGA help!

Altera_Forum
Honored Contributor II
799 Views

So far i've got this - I've looked at sample code, but I'm kinda stuck atm 

just won't work - any ideas? Thanks!! 

 

In verilog~ 

 

///////////////////////////////////////////////////////////////////////////////// 

// VGA Controller 

///////////////////////////////////////////////////////////////////////////////// 

 

 

always @(posedge CLOCK_50) begin 

if (count1 == 0) begin 

ledcounter = ledcounter+1; 

end 

 

count1 = count1+1; 

 

//divide by 2 = 25 MHz 

if (count == 1) begin 

count = 0; 

end 

else begin 

refreshHVGA(); 

refreshVVGA();  

count = 1; 

end 

end  

 

// Horizontal 

// 96 Sync 

// 48 Back Porch 

// 640 Pixel 

// 16 Front Porch 

// 800 total 

task refreshHVGA; 

begin  

 

//Reset 

if (h_cnt == 800) begin 

h_cnt = 0; 

v_cnt = v_cnt+1;  

end 

 

if (h_cnt == 0) begin 

//Sync (96 cycles) 

vga_h_sync = 0; 

p_flag = 0; 

end 

else if (h_cnt == 96) begin 

//Back Porch B (48 cycles) 

vga_h_sync = 1; 

 

end 

else if(h_cnt == 144) begin 

//Display Interval C (640 cycles) 

 

if(v_flag) begin 

//RGB Row On 

//get from BMP file 

 

red = 255; 

green = 0; 

blue = 0; 

end 

 

end 

else if (h_cnt == 784) begin 

//Front Porch D (0.6 us) 

//set output to 0 

red = 0; 

green = 0; 

blue = 0; 

end 

 

h_cnt = h_cnt+1; 

end 

endtask 

 

// Vertical 

// 2 Sync 

// 33 Front Porch 

// 480 Video Lines 

// 10 Back Porch  

// 525 Lines total 

task refreshVVGA; 

begin 

//Reset 

if (v_cnt == 525) begin 

v_cnt = 0; 

end 

 

if (v_cnt == 0) begin 

//Sync A (2 lines) 

vga_v_sync = 0; 

end 

else if (v_cnt == 2) begin 

//Back Porch B (33 lines) 

vga_v_sync = 1; 

end 

else if (v_cnt == 35) begin 

//Display Interval C (480 lines) 

//wait for horizontal to do it's job 

 

v_flag = 1; 

end 

else if (v_cnt == 515) begin 

//Front Porch D (10 lines) 

 

v_flag = 0; 

end 

end 

endtask 

endmodule
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
125 Views

 

--- Quote Start ---  

So far i've got this - I've looked at sample code, but I'm kinda stuck atm 

just won't work - any ideas? Thanks!! 

 

In verilog~ 

 

///////////////////////////////////////////////////////////////////////////////// 

// VGA Controller 

///////////////////////////////////////////////////////////////////////////////// 

 

 

always @(posedge CLOCK_50) begin 

if (count1 == 0) begin 

ledcounter = ledcounter+1; 

end 

 

count1 = count1+1; 

 

//divide by 2 = 25 MHz 

if (count == 1) begin 

count = 0; 

end 

else begin 

refreshHVGA(); 

refreshVVGA();  

count = 1; 

end 

end  

 

// Horizontal 

// 96 Sync 

// 48 Back Porch 

// 640 Pixel 

// 16 Front Porch 

// 800 total 

task refreshHVGA; 

begin  

 

//Reset 

if (h_cnt == 800) begin 

h_cnt = 0; 

v_cnt = v_cnt+1;  

end 

 

if (h_cnt == 0) begin 

//Sync (96 cycles) 

vga_h_sync = 0; 

p_flag = 0; 

end 

else if (h_cnt == 96) begin 

//Back Porch B (48 cycles) 

vga_h_sync = 1; 

 

end 

else if(h_cnt == 144) begin 

//Display Interval C (640 cycles) 

 

if(v_flag) begin 

//RGB Row On 

//get from BMP file 

 

red = 255; 

green = 0; 

blue = 0; 

end 

 

end 

else if (h_cnt == 784) begin 

//Front Porch D (0.6 us) 

//set output to 0 

red = 0; 

green = 0; 

blue = 0; 

end 

 

h_cnt = h_cnt+1; 

end 

endtask 

 

// Vertical 

// 2 Sync 

// 33 Front Porch 

// 480 Video Lines 

// 10 Back Porch  

// 525 Lines total 

task refreshVVGA; 

begin 

//Reset 

if (v_cnt == 525) begin 

v_cnt = 0; 

end 

 

if (v_cnt == 0) begin 

//Sync A (2 lines) 

vga_v_sync = 0; 

end 

else if (v_cnt == 2) begin 

//Back Porch B (33 lines) 

vga_v_sync = 1; 

end 

else if (v_cnt == 35) begin 

//Display Interval C (480 lines) 

//wait for horizontal to do it's job 

 

v_flag = 1; 

end 

else if (v_cnt == 515) begin 

//Front Porch D (10 lines) 

 

v_flag = 0; 

end 

end 

endtask 

endmodule 

--- Quote End ---  

 

 

1. This is not a complete hardware description, I can't determine which signals are wires and which signals are ports. So it is pretty much impossible to debug.  

 

For instance, you set p_flag and use v_flag? I think by "p_flag", you actually mean "v_flag"? 

 

2. Did you try simulating your module (in ModelSim, for example) and/or looking at your 25 MHz clock, VSync, HSync, R, G, B lines using a logic analyzer? If you did, please post a screen shot of your simulation and/or logic analyzer results. 

 

Bart
Altera_Forum
Honored Contributor II
125 Views

Sorry!! 

 

output VGA_HS; // VGA H_SYNC 

output VGA_VS; // VGA V_SYNC 

output [3:0] VGA_R; // VGA Red[3:0] 

output [3:0] VGA_G; // VGA Green[3:0] 

output [3:0] VGA_B; // VGA Blue[3:0] 

 

// 50 Mhz clock 

input CLOCK_50; // 50  

 

reg [0:7] count, h_cnt, v_cnt, p_cnt; 

reg [0:4] red, green, blue; 

reg [0:1] vga_h_sync, vga_v_sync; 

reg [0:1] p_flag, v_flag; 

 

****p_flg is no longer used  

 

reg [0:20] count1; //for running LEDs 

 

assign VGA_HS = vga_h_sync; 

assign VGA_VS = vga_v_sync; 

assign VGA_R = red; 

assign VGA_G = green; 

assign VGA_B = blue; 

 

No, I do not have modelsim, ill go grab it 

//nvm, need licence and whatever :-/
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