FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

DE10-Lite and ADC

ETang2
Beginner
1,277 Views

Hello, i tried to follow this tutorial 

ftp://ftp.intel.fr/Pub/fpgaup/pub/Intel_Material/17.1/Tutorials/Using_DE_Series_ADC.pdf

to use ADC with DE10-LITE card. But it seems to not work with this card. The read value in the C program is always 0 which is not the case because i can see a value using https://www.youtube.com/watch?v=0oO1RFa-4Xk

The main difference with the tutorial is that Max10 have internal ADC so maybe i don't do what i have to do with external connections in vhd and qsys files.

Thanks for the help ...

Eric

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EngWei_O_Intel
Employee
1,248 Views

Hi Eric

There is a design sample available at the below link using NIOS with ADC for Max10: 

https://fpgacloud.intel.com/devstore/platform/16.0.0/Standard/adc-data-capture-with-nios-ii-processor/

You can reference to it and make necessary changes according to your device and board requirements.

 

Thanks.

Eng Wei

 

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ETang2
Beginner
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Hi Eng Wei and thank you very much for this design.

I tried it but in the Qsys the component NiosSubsystem is missing.

How can i solve this ?

Eric

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EngWei_O_Intel
Employee
1,215 Views

Hi Eric

The NiosSubsystem is available in the design but not in the Platform Designer. It might be due to compatible issue during migration from one version to another. If you need to reconstruct the design in Platform Designer, you can refer the RTL that is being coded and rebuild the NiosSubsystem. 

 

Thanks.

Eng Wei

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EngWei_O_Intel
Employee
1,158 Views

Hi Eric

We do not receive any response from you to the previous reply that have been provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

 

Eng Wei

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