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Altera_Forum
Honored Contributor I
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DE10-NANO - How to use the ADC with FPGA and NIOSII

Hello, I just started learning about FPGA, NIOSII and QuartusII. 

 

I have the DE10-NANO Dev. Board and I want to learn how to use the ADC and FPGA (NIOS II) to read some analog data. 

 

I've programmed the FPGA with the ADC demonstration provided by Terasic. 

 

Here is the code that converts the data from CH 0 as it comes in the demo: 

 

#include <stdio.h>#include <io.h> #include <unistd.h> #include "system.h" void main(void){ int ch = 0; const int nReadNum = 10; // max 1024 int i, Value, nIndex=0; printf("ADC Demo\r\n"); while(1){ ch = IORD(SW_BASE, 0x00) & 0x07; printf("======================= %d, ch=%d\r\n", nIndex++, ch); // set measure number for ADC convert IOWR(ADC_LTC2308_BASE, 0x01, nReadNum); // start measure IOWR(ADC_LTC2308_BASE, 0x00, (ch << 1) | 0x00); IOWR(ADC_LTC2308_BASE, 0x00, (ch << 1) | 0x01); IOWR(ADC_LTC2308_BASE, 0x00, (ch << 1) | 0x00); usleep(1); // wait measure done while ((IORD(ADC_LTC2308_BASE,0x00) & 0x01) == 0x00); // read adc value for(i=0;i<nReadNum;i++){ Value = IORD(ADC_LTC2308_BASE, 0x01); printf("CH%d=%.3fV (0x%04x)\r\n", ch, (float)Value/1000.0, Value); } usleep(200*1000); } // while }  

 

My problem is that I don't know where am I supposed to search to get the basics of how it works. I don't understand where the channel is selected here, or where the ADC is configured. I understood that the IORD and IOWR use the starting address and the offset to get to the address I need but where should I find how are all these addresses arranged and what are the parameters needed for each case. 

 

I'll be glad if you could help me understand how all this work and even better give me some tips about how and where should I been looking for this info. 

 

Thank you very much in advance.
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Altera_Forum
Honored Contributor I
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Check the system.h file in the BSP project for info on the macros in this code. Open the .qsys file for the design to see the hardware implementation and the parameter settings for the ADC IP.

Altera_Forum
Honored Contributor I
290 Views

 

--- Quote Start ---  

Check the system.h file in the BSP project for info on the macros in this code. Open the .qsys file for the design to see the hardware implementation and the parameter settings for the ADC IP. 

--- Quote End ---  

 

 

Thank you for your quick reply. 

 

I did all of that but I couldn't find any useful info, I only get the base and end address in the QSYS picture below. 

 

my qsys image (http://i66.tinypic.com/316b0gj.png

 

adc parameters in qsys image (http://i63.tinypic.com/2052jnn.png

 

Here is the relevant code from the system.h file: 

/* * adc_ltc2308 configuration * */ # define ADC_LTC2308_BASE 0x81010 # define ADC_LTC2308_IRQ -1 # define ADC_LTC2308_IRQ_INTERRUPT_CONTROLLER_ID -1 # define ADC_LTC2308_NAME "/dev/adc_ltc2308" # define ADC_LTC2308_SPAN 8 # define ADC_LTC2308_TYPE "adc_ltc2308" # define ALT_MODULE_CLASS_adc_ltc2308 adc_ltc2308 

 

I must be missing something.
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