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DE4 Clock (PLL) output port (SMA connector)

Altera_Forum
Honored Contributor II
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Hey Community!  

 

As you may know the DE4 board has two clock output ports (with SMA connectors named SMA_clockout_{p,n}). I would like to use one of them to output a 40 MHz clock to feed a clock circuit on another board. As a first approach I used "Terasic System Builder" project generation to assign automatically the pins. It assign the pins routed to as LVDS.  

 

I would like to know if I can change the LVDS configuration to 2.5V configuration (or even to 3.3V) with OCT (50 Ohm On Chip Termination, for impedance matching). 

 

Thanks in advance.
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