FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5892 Discussions

DK-NIOS-2S60N -- problem with direct JTAG configuration

Altera_Forum
Honored Contributor II
883 Views

Hello,  

 

I have a dk-nios-2s60n board (http://www.altera.com/products/devkits/altera/kit-niosii-2s60.html). Board and Stratix ii works fine with factory config. When I try to configure Stratix ii with my own verilog configuration (QII 9.0) via USB-Blaster - then the problem arise: 

 

During the configuration process the LED 4 (Error) is lighting up on the board. After configuration process nothing happens - all LED is dark (except LED 6 (Config_done) and LED 5 (Power)).  

 

I try to load to fpga the following simple code: 

 

 

--- Quote Start ---  

module test(LED); 

 

output LED; 

assign LED=1; 

 

endmodule  

--- Quote End ---  

 

 

In Assignments edition I write: 

 

--- Quote Start ---  

LED Location PIN_W15 Enabled 

--- Quote End ---  

 

 

All unused pins is configured as tri-stated inputs. 

 

Could I load to fpga arbitrary verilog code ? Or DK-NIOS-2S60N is preconfigured to work only with NIOS II ? 

 

Thank you 

 

the QII Jtag programmer log: 

 

--- Quote Start ---  

Info: Started Programmer operation at Tue Nov 03 19:43:53 2009 

Info: Configuring device index 1 

Info: Device 1 contains JTAG ID code 0x120930DD 

Info: Configuration succeeded -- 1 device(s) configured 

Info: Successfully performed operation(s) 

Info: Ended Programmer operation at Tue Nov 03 19:43:57 2009 

--- Quote End ---  

0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
246 Views

My bad :) 

 

From DK-NIOS-2S60N reference manual: 

 

--- Quote Start ---  

When a pin drives logic 0, the corresponding LED turns on. 

--- Quote End ---  

0 Kudos
Reply