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Disappointed with Cyclone III FPGA Development Kit

Altera_Forum
Honored Contributor II
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I'm sure nobody cares, but I just wanted to express my disappointment with the long awaited Cyclone III FPGA Development Kit. 

 

I was naively hoping for something as general purpose and good value, but the new kit fail on both accounts. $1500 for a board with a very odd set of peripherials. Maybe it's just me, but dump the LCDs and give me VGA anyday, and how about some practical IO, like those of the DE2 or fx. ML505. While hardly any production design would need them, they are invaluable for proof-of-concept type applications. 

 

Rant aside, I just don't understand how Altera came up with this. 

 

Tommy
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Altera_Forum
Honored Contributor II
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Fair concern. I think part of the problem with these boards is no matter whats on them, your always short one IO or one memory of having the perfect platform. If you need additional IO I think the idea is to rely on the HSMC expansion ports, since there are two of them. 

 

If your looking for video stuff like you mentioned, try Bitec. They have a quadchannel video card and a DVI card. Total, you can get 8 composite inputs, 1 VGA out, 1 DVI out plus 1 more DVI in out pair. Thats a lot of video =). 

 

http://www.bitec.ltd.uk/products_fpga.html 

 

Additionally, I did confirm that the DDR2 memory is separable from a 64 bit bus, to two 32 bit buses, which I think is helpful for video applications.
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Altera_Forum
Honored Contributor II
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I am not sure which card you are refering to for $1500? 

 

Is this the 3C120 board? 

 

I believe that there is a now entry level board in the works that might get you what you want. 

 

Check out TerASIC for a card that adds onto the 3C25 board.
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Altera_Forum
Honored Contributor II
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There is only one "Cyclone III FPGA Development Kit" under "Altera Development Kits" (http://altera.com/products/devkits/kit-dev_platforms.jsp), which is indeed the 3C120 one. 

 

There are only two TerasIC HSMC extension boards listed on both their own site and Altera's (http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=39&no=219 and http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=39&no=218), neither of which invalidates what I wrote originally. 

 

Just noticed that TerasIC has a new board out - a $600 2C70 based card with 32 (64?) MiB of SDRAM: http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=39&no=226
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Altera_Forum
Honored Contributor II
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I agree with TommyThorn on this kit, however, my disappointment right now is more related to having some working examples to use. I am new to the FPGA development area and I figured this would be a good way to get my feet wet working with example hardware with working examples to understand the interaction better. Examples for this board are minimal to say the least and don't even cover all of the components of the kit. I also understand that there is at least a design flaw for the 7 segment led. You would think that Altera's testing of the kit would have proven that out early on. 

 

Bad first impression for Altera.
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Altera_Forum
Honored Contributor II
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Hi, 

 

Altera cares about your feedback. We are running regression testing on all the development kits to make sure that the user has the good first impression on the development kits. Testing will be done for every Quartus II software release. 

 

If you have issue with the kits, feel free to file a mysupport question and Altera support personel will be happy to assist you. 

 

Regards, 

Rubikian
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Altera_Forum
Honored Contributor II
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CIII dev kit currently has test design as below now compared to when it was first launched: 

1. Board Update Portal 

2. Board Test System 

a. Push Buttons 

b. LEDs 

c. DIP switches 

d. Character LCD 

e. Read/Write on Flash 

f. Read/Write on SSRAM 

g. Simple Socket Server 

h. Monochrome LCD 

i. Read/Write DDR2 

 

This shall cover the first time users' need.
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Altera_Forum
Honored Contributor II
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On a side note, please do check up with the latest Altera Development and Education Series Kits. These boards are completely tailored towards beginners who are looking to get into FPGA design as they include all peripheral reference designs in the same package.  

 

Altera University Program also features extensive tutorials and lab exercises at http://www.altera.com/education/univ/materials/digital_logic/tutorials/unv-tutorials.html.
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Altera_Forum
Honored Contributor II
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Well, my first impression (as a newbie, so trying out the university-program stuff for the reasons mentioned by mphmark) wasn't great. Here's how it panned out for me: 

 

1) I noticed that Altera support Linux. Wahey! I can install a VM for that on my mac. I want to try out all the software before shelling out for any expensive licences :) 

 

2) Ordered a DE0, started reading more in depth, installed Quartus-2 v11 via the web-download. 

 

3) Got the DE0, plugged everything in, saw the demo so the board works. Great, now to start some of the (excellent looking) tutorials. I learn better when I try, rather than just read... So far, so great... 

 

4) Start working my way through the 'Introduction_to_the_Altera_SOPC_Builder' PDF, get to where I can start to test it, and, ... oh. I need a windows box to run the Altera monitor. Darn. Note: I specified DE0 as the board-type, it doesn't mention windows as a requirement... 

 

5) Order windows from Amazon... [sigh] 

 

6) While I'm waiting for delivery, start poking around the university ftp site. There's a whole slew of stuff in Altera_material/10.1 (nothing for 11.0 yet, but 11 > 10.1, right ?) and it has docs on the DE0 for the basic/media computer. Yay.  

 

7) Windows arrives. Download the Altera web install again (for Win7 this time). Install the windows-monitor program. Start through the tutorial and it seems I need to have a 'system' pre-installed on the board. Ok, fair enough. I found that 10.1 directory while I was waiting for Amazon... 

 

8) Try to install the altera_upds_setup.exe from the 10.1 folder. Nope. It complains that you need 10.1, and I have 11.0 [sigh]. Ok, I doubt there's too much difference for a newbie between 10.1 and 11.0 ... Let's go download 10.1 instead from the Altera website... 

 

9) ... Nope. All that seems to be available is 11.0 ... [deep sigh] 

 

So, now I have a board I'm going to struggle with far more than I expected, a windows-install that I didn't really want anyway, and no, nada, zero, zilch progress. If you're trying to make a good first-impression, this isn't it. This would be 'night' to a good impression's 'day'... 

 

I recognise that Altera's under no obligation to support me, I understand that you've put a lot of effort into making this possible for (at least some) people for minimal outlay. That doesn't make me any less frustrated and annoyed that I've coughed up cash, and then just found (unexpected) obstacles. 

 

It doesn't take too much QA to start with a blank OS, and run through an install from start to finish. If the QA person can't get up and running without using internal-only resources, something is wrong. Perhaps that *is* possible, and perhaps I'm just overlooking something, but in that case you need a clear document saying "get this from <url>, get that from <other url>", and again, this isn't rocket science.  

 

*glances over at demo-design counting LED display and cylon-esque led pattern, and sighs, deeply, thinking of what might have been* 

 

Simon
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Altera_Forum
Honored Contributor II
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Hey Simon, 

 

Sorry to hear you've had a bad impression of the kits so far. 

 

I have a slightly different approach when it comes to kits. I assume the example code will be junk, so start from scratch. I create a design called 'basic' that implements the bare-minimum in VHDL; generally a clock divider and blinking LEDs. There is at least two files you need; the design VHDL or Verilog and a constraints file. The contents of the constraints file can be minimized by using the GUI to create a new project, select the FPGA on your board, and then source a Tcl script that contains just the pin assignments. As you get more familiar with the design tools, you can create more complex scripts, or ask me, and I'll post examples. 

 

If you do not see the Tcl console under Quartus, use View->Utility Windows->Tcl Console to bring it up. 

 

Where can you get the correct pins? I first get copy of the schematic, and then find a fairly complete example that comes with the board. I take that example and use the Quartus 'Project->Generate Tcl File for Project' option to generate the Altera script for the design. I then cut-and-paste that file into Tcl procedures, in your case, you could just delete everything except for the pin assignments. Then go through each page of the schematic and find the corresponding nets on the FPGA. Rename pins to something sane, eg. DDR interface signals can all be prefixed with ddr_xxx, and add missing pins. 

 

Before you download to the board, use the Assignments->Pin Planner window to see that all signals have been assigned. Check the I/O voltages on that page with respect to the voltages on the schematic. You might also need some voltage constraints on the I/O. 

 

Take a shot at doing this, and if you get stuck, ask questions. I'll send you code if you like, but I don't want to spoil the excitement for you, of figuring out how it works. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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So, I've actually found the 10.1 download area by clicking around links on the site. I'll try again with 10.1 instead of 11.  

 

... which leads me to another rant, sorry... 

 

Now I can't *uninstall* 11.0. There is a folder on my (previously virgin) disk named 'C:/altera/11.0/nios2eds/bin' that is read-only (to administrators, of which I am one), that cannot be removed. I've been googling away, and so far I've tried: 

 

- Taking ownership of the directory and trying to delete. Nope. 

- using the commandline to delete. Nope. 

- running the commandline as Administrator and trying to delete. Nope. 

- Changing the permissions away from read-only. Denied. 

- Running chkdisk. Everything passes. 

 

So, I'm stuck with a vestigial folder that I can't get rid of. I don't know if this is a Windows-7 problem or an Altera-installer problem, but it's annoying either way. At this point, my mind is blown. WTF were Microsoft thinking to even make this situation possible ??? Jeez. 

 

... ok, rant over. I'm going to lay this one at Microsoft's feet anyway - hey, I'm a Mac user, I'm biased! :) 

 

Presumably 10.1 won't install anything into a folder with an 11.0 in it, so as long as I never upgrade, I'll be fine :rolleyes: 

 

Thanks for the help, Dave. I don't know tcl, that's one of the languages I've managed to not use over the last couple of decades, but I'll add it to the list of things to learn...  

 

At this point, I just want some good news, so I'm going to try following the tutorial with 10.1, and if I can get that to work, I'll start digging in and getting more of the low-level knowledge that eventually leads to understanding :) 

 

Cheers 

Simon
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Altera_Forum
Honored Contributor II
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Hi Simon, 

 

 

--- Quote Start ---  

 

Presumably 10.1 won't install anything into a folder with an 11.0 in it, so as long as I never upgrade, I'll be fine :rolleyes: 

 

--- Quote End ---  

I have several versions of the tools installed under Windows XP and there are no conflicts. I have not tried uninstalling from Windows 7, so can't comment on your issues, or offer suggestions, sorry. 

 

 

--- Quote Start ---  

 

I don't know tcl, that's one of the languages I've managed to not use over the last couple of decades, but I'll add it to the list of things to learn...  

 

--- Quote End ---  

Its not the newest and fanciest of scripting languages, but it works. If you are serious about using FPGA tools, then you have to learn it. Altera, Mentor (Modelsim), Xilinx (ISE), Lattice (Diamond), Synopsys (.sdc files), etc., all use Tcl. Buy the book by Brent Welch, and that'll give you the Tcl basics, then from within the tools, generate Tcl files for projects, and learn to dissect them. After a couple of iterations, you'll get the hang of it, and when you get stuck, just ask questions. 

 

Cheers, 

Dave
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