Do VCCIO 1A and VCCIO 1B need to be at 2.5V when using ADC in 10M16DA U324?

[BAdam1]

Let fitter pick pins and Quartus assigned 3.3V pins to VCCIO 1A and VCCIO 1B with ADC instantiated in design. PCG is not very clear about the voltage for these banks when using the ADC in a dual supply device.

[Rahul_S_Intel1]

Hi ,

In PCG , kindly find the explanation, may I know what makes the confusion.

If you enable the ADC feature, connect VCCIO1A and VCCIO1B to either 3.0- or 3.3-V depending on the VCC_ONE pins used

Page no: 14

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/max-10/pcg-01018.pdf

[BAdam1]

Page 14 refers to a Single Supply MAX10 device. I am using a dual supply MAX10 device. 10M16DA U324 Page 23 shows a Dual supply implementation with the ADC. The question remains can VCCIO1A and VCCIO1B be tied to 3.3V when using the ADC in a dual supply device. All examples show 2.5V.