FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5288 Discussions

Electrical and Switching Specifications of Arria V CLKxxP/N pins

SKacc
Novice
267 Views

Hi Team

 

Can you please provide Electrical and Switching characteristics of CLKXX pins of Arria V FPGA?

 

Regards

Srikanth Kacchu

0 Kudos
3 Replies
EngWei_O_Intel
Employee
247 Views

Hi Srikanth Kacchu

Sorry for late response.

Below is the doc (Section 1.1 and 1.2) that listing the Electrical and Switching characteristic:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-v/av_51002.pdf

 

Can you let us know if the doc is helpful?

Thanks.

Eng Wei

EngWei_O_Intel
Employee
224 Views

Hi Srikanth Kacchu

We do not receive any response from you to the previous reply that we have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Eng Wei

SKacc
Novice
209 Views

Hi

 

1. What are the rise time, duty cycle, fall time and jitter specifications of CLK input/output and IO input/output signals?

2. Switching characteristics are provided for Transceiver signals only in section 1.2.

 

Regards

Srikanth Kacchu

 

Reply