Error with DE0-Nano ADC Controller IP

[VToh]

Hi all:

I am trying to read voltage signals using the ADC on my DE0-Nano-SoC Cyclone V board by referring to "USING THE DE0-NANO ADC CONTROLLER for Quartus II 15.0" tutorial:

In Section 3.3: Implementing the ADC Controller with IP Catalog, I followed all the instructions. However, when I open the DE0-Nano ADC Controller in the IP Parameter Editor, a warning appears: 

"Warning: adc_controller.altera_up_avalon_de0_nano_adc_mega: File C:/altera/15.0/ip/altera/university_program/input_output/altera_up_avalon_de0_nano_adc/hdl/adv_adc.v not found."

When I try to generate the HDL, an error appears due to this missing file and this causes my compilation to fail.

I have tried this on 2 computers and reinstalled Quartus II 15.0 several times but this problem still persists. Anyone knows why?

Thank you!

[JonWay_C_Intel]

Hi @VToh

Could you try with Quartus 17.0 as in ftp://ftp.intel.com/Pub/fpgaup/pub/Intel_Material/17.0/Tutorials/Using_DE_Series_ADC.pdf

Btw, what Quartus are you using? Lite or Standard?

[JonWay_C_Intel]

Hi, may i know if you still require any assistance?