There is 4 GB DDR4 memory on our customer Arria10 Board. And we built the "EMIF Debug Toolkit example" to run on the board, The EMIF Calibration is pass.
But we need to run to scan the full "4GB" DDR memory to sanity check the Hardware aspect of DDR4, is there a DDR reading/writng access example to verify this ?
I'm not very familair to FPGA, so I want get help . Thanks
The example design includes the Traffic Generator (or in recent versions of the memory IP, Traffic Generator 2.0) that can be used for this purpose. See the EMIF IP user guide for details on its use. See the documentation here:
If your system is running on OS level like Windows or Linux then you can explore to use some commercial test software like "memtest" software
Feel free to google and checkout some RAM test software. Example of one of the link below