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Hi Goswami,
Yes, we can use piggyback boards or a socket for FPGA. In ATE testing we use sockets on load board.
You can contact Yamaichi for sockets or other vendors.
Look below links which are useful
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an080.pdf
https://www.intel.com/content/www/us/en/programmable/support/support-resources/operation-and-testing/packaging-and-thermal/dev-layout_socket.html
Regards
Anand
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Thanks for the response. Do you mean irrespective of speed such connectivity not an issue? I studied some literature where they are advising to be very carefull in FPGA board design about impact of discontinuities arises out of such connectivities mostly on reflection and jitter. Is any specific test to be done to qualify such deisgn on socket or piggybacked connectivity?
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Hi Goswami,
I am talking about connectivity only. Regarding speed, Socket & piggyback board design Should meets timing requirements.
Is any specific test to be done to qualify such design on socket or piggybacked connectivity?
Let me check and come back
Regards
Anand
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Hi Goswami,
Sorry for the delay,
Is any specific test to be done to qualify such design on socket or piggybacked connectivity?
There is no official socket design/piggyback connectivity test specification.
You can discuss with the socket vendor directly or board design team for more input.
Intel FPGA can offers is the FPGA packaging mechanical spec in below link.
https://www.intel.com/content/www/us/en/programmable/support/literature/lit-index/lit-pkg.html
Regards
Anand
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