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5231 Discussions

Failure proramming my DE1-SOC

Honored Contributor II

I just received my DE1-SoC FPGA dev board from Altera to learn verilog and system verilog on. 



I just ran through [this](ftp://ftp.altera.com/up/pub/altera_material/14.0/tutorials/verilog/quartus_ii_introduction.pdf) tutorial to get started and everything was working great up until section 9.2 (Programming the DE1-Soc). First off when I hit programmer nothing appeared, so just as it instructed i changed the Device to DE1-SoC and added the sof file. [But my picture of devices only had one device on it, not two like it showed.](http://i.imgur.com/z4oyevj.png). 



I hit "Start" anyway to see if it would work and sure enough the screen just flashed and the Progress bar said (Failed) in it. So i tired a different technique and hit Auto-Detect and selected my specific FPGA which got it to bring up [both devices that the picture showed.](http://i.imgur.com/dsxxznv.png). 



I clicked and dragged the SOCVHPS (whatever the **** that is) and made it the second device and then double clicked the 5CSEMA5 in the list and made it the sof file. [Now it looked exactly like the picture in the tutorial](http://i.imgur.com/az1xyzb.png), but even when i hit start the progress bar still says Failed. 



Please help me program my DE1-SoC, i am excited to learn but this hurdle is annoying and stopping me from feeling accomplished with anything (i cant believe i couldn't even get passed the tutorial without needing to troubleshoot. 



I am pretty sure USBBlaster is correctly intalled as when i plugged my FPGA in it said it installed it. [Here is a picture of my device manager listing USBBlaster.](http://i.imgur.com/orrqy2q.png)
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2 Replies
Honored Contributor II

Maybe u can get a better idea on what was going wrong from the message log. The USBBlaster cable is installed correctly since you can detect the devices

Honored Contributor II

Have you checked that the DIP switches are in the right positions? I am not sure about that board but some boards you can switch parts of the JTAG chain in or out by use of jumpers or DIP switches.