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Altera_Forum
Honored Contributor I
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Flash SSRAM pinout confusion NEEK 2C35

I'm a vhdl guy, so working through the verilog examples in the NEEK is a little bumpy for me. I started a from-scratch build in vhdl of the example designs but have run in to an area of confusion for me. 

 

It appears that the address bus for the flash and ssram tri-state bridge is listed in the examples as [23 : 0] which I assume is a 24-bit address bus. However, the address assignments are listed as 25 down to 1. In vhdl, do I assign bit 0 to the address bit 1, and so on up the bus? 

 

I also noticed in DS-01003-1.1 (Nios II 3C25 Microprocessor with LCD Controller Data Sheet) that they only list the pinout for bits 23 down to 1. 

 

Any clarification on this would be greatly appreciated!
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Altera_Forum
Honored Contributor I
32 Views

I actually figured it out myself. I was missing a virtual pin assignment that was used on address pin 0.