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MSchi30
Beginner
281 Views

Flash programming for 2nd FPGA on Arria V GT FPGA Development Kit (DK-DEV-5AGTD7N)

The user guide describes how to program the flash memory device for the 1st FPGA in Appendix A. However I cannot figure out how to do that for the 2nd FPGA.

P.S. I cannot easily connect the board to a router to use the update portal, so I need to use the Nios II EDS to program the flash.

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7 Replies
AR_A_Intel
Employee
54 Views

Hello,

 

Welcome to INTEL forum. Sorry as I read through the Case description, I am not sure on what is the specific enquiry. What do you mean by “Flash programming for 2nd FPGA" what 2nd FPGA do you refer to ?

Would you mind helping to further elaborating on what is the specific request?

MSchi30
Beginner
54 Views

I am referring to this eval board:

https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-ar...

 

It has 2 FPGAs on it.

The flash device holds 2 hardware images for the 1st FPGA. Which one is loaded at power up is selectable with a switch.

 

However I don't see how to load the 2nd FPGA. I hope JTAG programming is not the only way to load the 2nd FPGA because that would not be permanent.

AR_A_Intel
Employee
54 Views

Hi

 

May I know, have you try the recommended commands in the user guide pg53 of 58,  

Because two FPGA devices are hardwired in the JTAG chain, and it is possible to configure Nios II CPU devices on both FPGAs simultaneously, nios2-flash-programmer commands may require the --device=<device index> and --instance=<instance> arguments.

 

nios2-flash-programmer -d 1 -i 0 --base=0x0 <yourfile>_hw.flash

 

After programming completes, if you have a software file to program, type the following Nios II EDS command:

 

nios2-flash-programmer -d 1 -i 0 --base=0x0 <yourfile>_sw.flash

 

Programming the board is now complete

MSchi30
Beginner
54 Views

Thanks for responding

I think I read that already, but I have not actually been able to try it because I don't have the board yet.

I am trying to confirm it does what I need before buying a $4,000 board.

 

However the procedure from the user guide on page 53 seems to only apply for FPGA 1:

The programming files used in the commands on page 53 are created with the commands on page 52.

The commands on page 52 again use the flash addresses given in table A-1 on page 51.

 

In table A-1 there are only the memory locations for the FPGA 1:

User hardware 2 at 0x02CA.0000

User hardware 1 at 0x0166.0000

Factory hardware at 0x0002.0000

selectable with PGM1 (S2)

 

The documentation doesn't seem to clearly state how to program FPGA2 permanently.

AR_A_Intel
Employee
54 Views

Hi

 

Upon checking with team it is possible to program FPGA2 using command --device=<device index>

 

MSchi30
Beginner
54 Views

This contradicts the explanation on page 21 of the user guide:

 

set the Load Selector (SW5.3) to the off (user) position and power cycle the board. (The design stored in user hardware 1 is used to configure FPGA 1 when the board is power cycled.) To configure FPGA 1 with the design stored in user hardware 2, push and release the PGM1 (S2) push button the required number of times until PGM2 LED lights and then push PGM_CONF (S3) to configure the FPGA.

 

According to that both images are used for FPGA 1.

 

Can you please give me some examples of the commands to both program FPGA 1 and and FPGA 2?

AR_A_Intel
Employee
54 Views

Hi sir

 

Upon checking, Using the dual_fpga_pfl_max2 allows you to program FPGA 1 with the user hardware 1 (PGM 1), and FPGA 2 with the design in user hardware 2 (PGM 2).

 

(1) FPGA 1 designs are loaded into PGM1 (User Hardware 1) which uses address mapping from 0x01640000 - 0x02C5FFFF) in the flash.

(2) FPGA 2 designs are loaded into PGM2 (User Hardware 2) which uses address mapping from 0x02C60000 - 0x0427FFFF) in the flash.

(3) After compiling your designs for each FPGA, verify that the FPGAs configures as expected.

(4) Then create the flash files

             (a) Open NIOS II command shell

             (b) Navigate to the directory where the sof file is located for the designs

             (c) Create the flash files for each FPGA

                            (1) Create flash file for Fpga 1 in the NIOS II command shell. Type "sof2flash --input=<yourfile>.sof --offset=0x01640000 --pfl --optionbit=0x00018000 --programmingmode=PS"

                            (2) Create flash file for Fpga 2 in the NIOS II command shell. Type "sof2flash --input=<yourfile>.sof --offset=0x02c60000 --pfl --optionbit=0x00018000 --programmingmode=PS"

(5) Program the flash with both FPGA designs

             (a) In the Nios II command shell

                            (1) Programming User Hardware 1 with FPGA 1 flash file. In NIOS II command shell type: "nios2-flash-programmer --base=0x0 <yourfpga1file>.flash

                            (2) Programming User Hardware 2 with FPGA 2 flash file. In NIOS II command shell type: "nios2-flash-programmer --base=0x0 <yourfpga2file>.flash

(6) Program the MAX II device with the "pfl_read_write_x16.pof"

(7) Power cycle the board and both FPGAs should be programmed from flash.

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