FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
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For the Intel MAX 10, can banks 2 through 7 be powered up and down at different times, separately from start up?

BPose
Beginner
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By separately it also means at random times that the logic will determine based on its internal design.

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YuanLi_S_Intel
Employee
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Hi Brittany,

 

Yes, it can be. The reason is because this 2 VCCIO are not monitored during power up. Thus, it can be powered up seperately from start up.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_pwr.pdf (Page 7)

 

May i know what is the purpose of doing that?

 

Thank You.

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BPose
Beginner
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We want to set a bank on the MAX 10 to 1.8V while everything else is set to 3.3V. The 1.8V bank will not be turn on until the sensor is activated. This could many hours later. Would that cause a problem with powering the MAX10?

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YuanLi_S_Intel
Employee
350 Views

Hi Brittany Posey,

 

We have not tested the FPGA at such scenario. But it might be working as Bank 1B and Bank 8 are needed only to power up in order for the device to boot up.

 

Thank You.

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