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Altera_Forum
Honored Contributor I
907 Views

Golden Top Level Pin Mapping Error

Hello, 

 

I'm trying to compile the Golden_Top project provided in the examples of the SoC Development Kit. 

 

When compiling the fitter is generating the following errors: 

Error (175019): Illegal constraint of I/O pad to the location PIN_C12 Info (175028): The I/O pad name: hsma_tx_d_p Error (12561): Pad 465 of non-differential I/O pin 'hsma_clk_out0' in pin location PIN_A10 is too close to pad 467 of differential I/O pin 'hsma_tx_d_p' in pin location PIN_C12 -- pads must be separated based on Cyclone V differential pad placement rule in Cyclone V Pin Connection Guideline document. Please use the Pad Mapping file to debug. Info (12562): Other invalid location for non-differential input pin: Pad 463, Location PIN_A11. Info (12562): Other invalid location for non-differential input pin: Pad 464, Location PIN_B12. Info (12562): Other invalid location for non-differential input pin: Pad 465, Location PIN_A10. Info (12562): Other invalid location for non-differential input pin: Pad 471, Location PIN_A9. Info (12562): Other invalid location for non-differential input pin: Pad 473, Location PIN_A8. Info (12562): Other invalid location for non-differential output pin: Pad 461, Location PIN_A13. Info (12562): Other invalid location for non-differential output pin: Pad 463, Location PIN_A11. Info (12562): Other invalid location for non-differential output pin: Pad 464, Location PIN_B12. Info (12562): Other invalid location for non-differential output pin: Pad 465, Location PIN_A10. Info (12562): Other invalid location for non-differential output pin: Pad 471, Location PIN_A9. Info (12562): Other invalid location for non-differential output pin: Pad 473, Location PIN_A8. Info (175029): 1 location affected Info (175029): PIN_C12 Error (175019): Illegal constraint of I/O pad to the location PIN_C13 Info (175028): The I/O pad name: hsma_rx_d_p Error (12561): Pad 465 of non-differential I/O pin 'hsma_clk_out0' in pin location PIN_A10 is too close to pad 462 of differential I/O pin 'hsma_rx_d_p' in pin location PIN_C13 -- pads must be separated based on Cyclone V differential pad placement rule in Cyclone V Pin Connection Guideline document. Please use the Pad Mapping file to debug. Info (12562): Other invalid location for non-differential input pin: Pad 463, Location PIN_A11. Info (12562): Other invalid location for non-differential input pin: Pad 465, Location PIN_A10. Info (12562): Other invalid location for non-differential input pin: Pad 466, Location PIN_F15. Info (12562): Other invalid location for non-differential input pin: Pad 467, Location PIN_C12. Info (12562): Other invalid location for non-differential output pin: Pad 463, Location PIN_A11. Info (12562): Other invalid location for non-differential output pin: Pad 465, Location PIN_A10. Info (12562): Other invalid location for non-differential output pin: Pad 466, Location PIN_F15. Info (12562): Other invalid location for non-differential output pin: Pad 467, Location PIN_C12. Info (175029): 1 location affected Info (175029): PIN_C13 Error (175019): Illegal constraint of I/O pad to the location PIN_E12 Info (175028): The I/O pad name: hsma_rx_d_p Error (12561): Pad 498 of non-differential I/O pin 'enet_fpga_mdio' in pin location PIN_H13 is too close to pad 494 of differential I/O pin 'hsma_rx_d_p' in pin location PIN_E12 -- pads must be separated based on Cyclone V differential pad placement rule in Cyclone V Pin Connection Guideline document. Please use the Pad Mapping file to debug. Info (12562): Other invalid location for non-differential input pin: Pad 495, Location PIN_D6. Info (12562): Other invalid location for non-differential input pin: Pad 497, Location PIN_C5. Info (12562): Other invalid location for non-differential input pin: Pad 498, Location PIN_H13. Info (12562): Other invalid location for non-differential input pin: Pad 499, Location PIN_D5. Info (12562): Other invalid location for non-differential output pin: Pad 495, Location PIN_D6. Info (12562): Other invalid location for non-differential output pin: Pad 497, Location PIN_C5. Info (12562): Other invalid location for non-differential output pin: Pad 498, Location PIN_H13. Info (12562): Other invalid location for non-differential output pin: Pad 499, Location PIN_D5. Info (175029): 1 location affected Info (175029): PIN_E12 Error (175019): Illegal constraint of I/O pad to the location PIN_A9 Info (175028): The I/O pad name: hsma_tx_d_p Error (12561): Pad 465 of non-differential I/O pin 'hsma_clk_out0' in pin location PIN_A10 is too close to pad 471 of differential I/O pin 'hsma_tx_d_p' in pin location PIN_A9 -- pads must be separated based on Cyclone V differential pad placement rule in Cyclone V Pin Connection Guideline document. Please use the Pad Mapping file to debug. Info (12562): Other invalid location for non-differential input pin: Pad 467, Location PIN_C12. Info (12562): Other invalid location for non-differential input pin: Pad 469, Location PIN_B11. Info (12562): Other invalid location for non-differential input pin: Pad 470, Location PIN_D11. Info (12562): Other invalid location for non-differential input pin: Pad 472, Location PIN_D10. Info (12562): Other invalid location for non-differential input pin: Pad 475, Location PIN_C7. Info (12562): Other invalid location for non-differential input pin: Pad 477, Location PIN_B7. Info (12562): Other invalid location for non-differential output pin: Pad 465, Location PIN_A10. Info (12562): Other invalid location for non-differential output pin: Pad 467, Location PIN_C12. Info (12562): Other invalid location for non-differential output pin: Pad 469, Location PIN_B11. Info (12562): Other invalid location for non-differential output pin: Pad 470, Location PIN_D11. Info (12562): Other invalid location for non-differential output pin: Pad 472, Location PIN_D10. Info (12562): Other invalid location for non-differential output pin: Pad 475, Location PIN_C7. Info (12562): Other invalid location for non-differential output pin: Pad 477, Location PIN_B7. Info (175029): 1 location affected Info (175029): PIN_A9 Error (175019): Illegal constraint of I/O pad to the location PIN_H14 Info (175028): The I/O pad name: hsma_rx_d_p Error (12561): Pad 476 of non-differential I/O pin 'pcie_smbdat' in pin location PIN_J14 is too close to pad 482 of differential I/O pin 'hsma_rx_d_p' in pin location PIN_H14 -- pads must be separated based on Cyclone V differential pad placement rule in Cyclone V Pin Connection Guideline document. Please use the Pad Mapping file to debug. Info (12562): Other invalid location for non-differential input pin: Pad 480, Location PIN_D9. Info (12562): Other invalid location for non-differential output pin: Pad 476, Location PIN_J14. Info (12562): Other invalid location for non-differential output pin: Pad 480, Location PIN_D9. Info (12562): Other invalid location for non-differential output pin: Pad 490, Location PIN_H8. Info (175029): 1 location affected Info (175029): PIN_H14 Error (175019): Illegal constraint of I/O pad to the location PIN_B13 Info (175028): The I/O pad name: hsma_tx_d_p Error (12561): Pad 465 of non-differential I/O pin 'hsma_clk_out0' in pin location PIN_A10 is too close to pad 459 of differential I/O pin 'hsma_tx_d_p' in pin location PIN_B13 -- pads must be separated based on Cyclone V differential pad placement rule in Cyclone V Pin Connection Guideline document. Please use the Pad Mapping file to debug. Info (12562): Other invalid location for non-differential input pin: Pad 463, Location PIN_A11. Info (12562): Other invalid location for non-differential input pin: Pad 465, Location PIN_A10. Info (12562): Other invalid location for non-differential output pin: Pad 463, Location PIN_A11. Info (12562): Other invalid location for non-differential output pin: Pad 465, Location PIN_A10. Info (12562): Other invalid location for non-differential output pin: Pad 467, Location PIN_C12. Info (175029): 1 location affected Info (175029): PIN_B13 Error (12289): An error occurred while applying the periphery constraints. Review the offending constraints and rerun the Fitter. 

 

From reading the documentation it does appear that these pins are assigned against the recommended layout - which is confusing seeing how this is an official Altera development board. 

 

The only cause I can think of may be incorrect IO standard selection, they are currently set to their default values when i open the project (2.5V) 

 

Can anybody provide any insight into how to solve this problem? 

 

Thanks in advance!
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2 Replies
Altera_Forum
Honored Contributor I
76 Views

there were some concerns when using differential and singled ended I/O in a bank that were brought up after the board was designed. i'm not sure what the latest guidelines are, but i would probably file an SR to request a work around for using one of Altera's dev kits

Altera_Forum
Honored Contributor I
76 Views

thankyou for that insight, 

 

Glad that its not just me
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