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In regards to the documentation (https://www.intel.com/content/www/us/en/programmable/documentation/sbe1494623766556.html#vsg1497651247886) for the JTAG section of the HPS IO48 OOBE daughtercard, it mentions that there are resistor mods available to perform an either/or connection between the FPGA_JTAG and the HPS_JTAG. The documentation has these resistors labeled as "Ra" and "Rb", however, nothing on the board is labeled "Ra" or "Rb." I also cannot locate a schematic for this daughtercard. Can someone provide the schematic or explain exactly which resistors are considered "Ra" and "Rb"?
And also, for the Stratix 10 SoC development kit, would "FPGA_JTAG" be considered the USB-to-Byte-Blaster connection (J57)? I'm trying to figure out if I can access the HPS JTAG using J57, or if I need to get a separate JTAG programmer.
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Hi,
I apologize for the late in response, I manage to find the schematic for the HPS IO48 OOBE daughtercard(Second page):
https://www.intel.com/content/dam/altera-www/global/en_US/support/boards-kits/arria10/soc/hps_io48_oobe_dc.pdf
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Hi,
Do you have any followup from your side?
Thanks.

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