HPS SPI MISO pin

[User1580871742356367]

I have a question about HPS SPI pin, MISO. It's HPS dedicated pin once configured. 

Was it able to MUX it with a HPS GPIO pin internally? Which means either one of them can go to HPS SPI controller. 

[EBERLAZARE_I_Intel]

Hi,

I did not get the device that you are using, which device are you referring to? Cyclone V SoC, Arria 10 SoC etc.

[User1580871742356367]

It's Arria 10SoC.

[User1580871742356367]

Does the SPI controller support 3-wire SPI?

[User1580871742356367]

Any updates? Thanks.

[EBERLAZARE_I_Intel]

Hi,

There are two MISO signal pins available for the SPI masters and SPI slaves.  Theses pins are routed and available to the HPS I/O, yes it can go to the SPI controller.

I recommend that you read our Arria 10 SoC HPS TRM SPI Controller section [page 3925], for more detailed information on the usage and interfaces of the SPI controller:

https://www.intel.com/content/www/us/en/programmable/documentation/sfo1410070178831.html

[User1580871742356367]

My question was not about general SPI and pins available from the HPS.

I like to know if it's possible to implement a 2:1 MUX that its inputs are connected to one of MISO pin and a HPS GPIO pin and the MUX output goes to a MISO port (not pin) of the HPS instant (or Soc subsystem).  

[EBERLAZARE_I_Intel]

hi,

Yes, you may do as such, but keep in mind you need to still close the timing for these. Also, make sure your are connecting to the correct MISO pins as both are in Master as Slave, which is an Input and Output respectively.