FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
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Hello, How come 2.5V is not in the Power Sequence Diagram of page 3 of document "s10gx_pcie_devkit_revD.pdf". Thanks

VBart
Beginner
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I have a Stratix 10 dev kit L-tile

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Rahul_S_Intel1
Employee
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Hi , Where have seen 2.5 V is mentioned can you provide the page no: of power sequence and explain in details
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