Both HSMC port A and B supports LVDS interface.
You can check DIFFIO_TX_xx & DIFFIO_RX_xx FPGA pin are used by HSMC ports. And which supports true LVDS transmitter & receiver channels on row and column I/O banks. Pins with a "p" suffix carry the positive signal for the differential channel.Pins with an "n" suffix carry the negative signal for the differential channel.
Please refer the pin connection guideline and schematic.
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.