Also, i believe the baking condition is based on package thickness, am i correct? Hope to hear from you soon. Thank you!
I think you might have posted this thread into the wrong community forum. This forum only covers Intel FPGA product. Our agents can only help to provide assistance with regards to FPGA product. If you have further enquiries on other Intel product, please post your question to the correct Intel Community topics from the link below:
We will then require deleting this thread from the Intel FPGA forum topic.
Intel FPGA Support Team
Unfortunately Intel is a very big organisation with different group supporting different product.
Intel FPGA forum support agent is not familiar with Intel chipset product.
Perhaps you can try out -> Hardware Products -> processors forum. The processor forum support agent maybe able to provide better guideline to you.
Intel FPGA support agent