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Timmio
Novice
428 Views

How can I use the HDMI Tx port on Arria V GX Starter kit?

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Hi all,

 

I wanted to use the HDMI Tx port on Arria V GX Starter kit, so I declaired the TMDS output pins and assigned the pins as:

HDMI_TX_CLK_P: PIN_AC3, 1.5-V PCML

HDMI_TX_CLK_N: PIN_AC4, 1.5-V PCML

HDMI_TX_P0: PIN_AJ3, 1.5-V PCML

HDMI_TX_N0: PIN_AJ4, 1.5-V PCML

HDMI_TX_P1: PIN_AG3, 1.5-V PCML

HDMI_TX_N1: PIN_AG4, 1.5-V PCML

HDMI_TX_P2: PIN_AE3, 1.5-V PCML

HDMI_TX_N2: PIN_AE4, 1.5-V PCML

 

HDMI_PINS.JPG

HDMI_PINS2.JPG

 

However, when I compiled the design, it showed:

"Error (14566): The Fitter cannot place 4 periphery component(s) due to conflicts with existing constraints (4 pin(s)). Fix the errors described in the submessages, and then rerun the Fitter. The Intel FPGA Knowledge Database may also contain articles with information on how to resolve this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number."

 

How can I solve this problem?

Can I use this port without INTEL HDMI IP?

Thanks.

 

Timmy

0 Kudos
1 Solution
Timmio
Novice
145 Views

Hi,

I used NIOS II Command Shell and executed quartus, then opened the project.

I generated the example again.

Finally, I had generated the example codes.

Thank you so much.

View solution in original post

6 Replies
BoonT_Intel
Moderator
145 Views

Hi Sir,

For HDMI in AV GX kit, you may refer to the available example design that can obtain from this document.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_hdmi.pdf#page=47

Please note that the section also guide you on how to generate the design. You may refer to the design on how to fit the HDMI IP in quartus.

Also, the port that you listed is transceiver port. You suppose can use it without HDMI IP for other reason.

Timmio
Novice
145 Views

Hi,

 

When I used the Quartus version 18.1 standard to generate the example code, I got the error message like this:

thumbnail_image.png

nfo: hdmi_0: Creating fixed parameters (ignoring your setting) design example

Info: hdmi_0: Adding files from C:/Users/Timmy/AppData/Local/Temp/alt8180_4493176939796044939.dir/0002_hdmi_0_gen/ to your directory

Error: no files matched glob pattern "*"

  while executing

"__altera__safe_glob -directory C:/Users/Timmy/AppData/Local/Temp/alt8180_4493176939796044939.dir/0002_hdmi_0_gen/av_sk_hdmi2/software/hdmi_demo_bsp *"

  ("uplevel" body line 1)

  invoked from within

"uplevel 1 [list __altera__safe_glob {*}$args]"

  (procedure "glob" line 2)

  invoked from within

"glob -directory $src_dir *"

  (procedure "glob_recursive" line 2)

  invoked from within

"glob_recursive $item [file join $dest_dir $filename] $top_name"

  (procedure "glob_recursive" line 8)

  invoked from within

"glob_recursive $item [file join $dest_dir $filename] $top_name"

  (procedure "glob_recursive" line 8)

  invoked from within

"glob_recursive [pwd] {} $ed_name"

  (procedure "generate_copy_ed" line 40)

  invoked from within

"generate_copy_ed $design_name($family)"

  (procedure "generate_example" line 11)

  invoked from within

"generate_example hdmi_0_example_design"

Error: Failed to generate example design example_design to: C:\Users\Timmy\Desktop\FPGA\Project_1\hdmi_example_design

 

How can I solve this error?

Thanks.

 

BoonT_Intel
Moderator
145 Views

Hi From the error message, looks like there is an issue from the Temp folder.

Please check if your Temp folder is read-only access.

Timmio
Novice
146 Views

Hi,

I used NIOS II Command Shell and executed quartus, then opened the project.

I generated the example again.

Finally, I had generated the example codes.

Thank you so much.

View solution in original post

MFort6
Beginner
145 Views

hi

i am having the same issue and i need help

so can u explain what exactly u did sir?

Timmio
Novice
145 Views

It can only use the example code with Intel IPs.

I gave up and use Xilinx FPGA. 😅

Although, There was the same issue on Xilinx FPGA. We can’t rewrite the HDMI port without the IPs.

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